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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 | /* * jazzdma.c * * Mips Jazz DMA controller support * (C) 1995 Andreas Busse * * NOTE: Some of the argument checking could be removed when * things have settled down. Also, instead of returning 0xffffffff * on failure of vdma_alloc() one could leave page #0 unused * and return the more usual NULL pointer as logical address. * */ #include <linux/kernel.h> #include <linux/errno.h> #include <asm/mipsregs.h> #include <asm/mipsconfig.h> #include <asm/jazz.h> #include <asm/io.h> #include <asm/segment.h> #include <asm/dma.h> #include <asm/jazzdma.h> static unsigned long vdma_pagetable_start = 0; static unsigned long vdma_pagetable_end = 0; /* * Debug stuff */ #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0) static int debuglvl = 3; /* * Local prototypes */ static void vdma_pgtbl_init(void); /* * Initialize the Jazz R4030 dma controller */ unsigned long vdma_init(unsigned long memory_start, unsigned long memory_end) { /* * Allocate 32k of memory for DMA page tables. * This needs to be page aligned and should be * uncached to avoid cache flushing after every * update. */ vdma_pagetable_start = KSEG1ADDR((memory_start + 4095) & ~4095); vdma_pagetable_end = vdma_pagetable_start + VDMA_PGTBL_SIZE; /* * Clear the R4030 translation table */ vdma_pgtbl_init(); r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,PHYSADDR(vdma_pagetable_start)); r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM,VDMA_PGTBL_SIZE); r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0); printk("VDMA: R4030 DMA pagetables initialized.\n"); return KSEG0ADDR(vdma_pagetable_end); } /* * Allocate DMA pagetables using a simple first-fit algorithm */ unsigned long vdma_alloc(unsigned long paddr, unsigned long size) { VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; int first; int last; int pages; unsigned int frame; unsigned long laddr; int i; /* check arguments */ if (paddr > 0x1fffffff) { if (vdma_debug) printk("vdma_alloc: Invalid physical address: %08lx\n",paddr); return VDMA_ERROR; /* invalid physical address */ } if (size > 0x400000 || size == 0) { if (vdma_debug) printk("vdma_alloc: Invalid size: %08lx\n",size); return VDMA_ERROR; /* invalid physical address */ } /* find free chunk */ pages = (size + 4095) >> 12; /* no. of pages to allocate */ first = 0; while (1) { while (entry[first].owner != VDMA_PAGE_EMPTY && first < VDMA_PGTBL_ENTRIES) first++; if (first+pages > VDMA_PGTBL_ENTRIES) /* nothing free */ return VDMA_ERROR; last = first+1; while (entry[last].owner == VDMA_PAGE_EMPTY && last-first < pages) last++; if (last-first == pages) break; /* found */ } /* mark pages as allocated */ laddr = (first << 12) + (paddr & (VDMA_PAGESIZE-1)); frame = paddr & ~(VDMA_PAGESIZE-1); for (i=first; i<last; i++) { entry[i].frame = frame; entry[i].owner = laddr; frame += VDMA_PAGESIZE; } /* * update translation table and * return logical start address */ r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0); if (vdma_debug > 1) printk("vdma_alloc: Allocated %d pages starting from %08lx\n", pages,laddr); if (vdma_debug > 2) { printk("LADDR: "); for (i=first; i<last; i++) printk("%08x ",i<<12); printk("\nPADDR: "); for (i=first; i<last; i++) printk("%08x ",entry[i].frame); printk("\nOWNER: "); for (i=first; i<last; i++) printk("%08x ",entry[i].owner); printk("\n"); } return laddr; } /* * Free previously allocated dma translation pages * Note that this does NOT change the translation table, * it just marks the free'd pages as unused! */ int vdma_free(unsigned long laddr) { VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; int i; i = laddr >> 12; if (pgtbl[i].owner != laddr) { printk("vdma_free: trying to free other's dma pages, laddr=%8lx\n", laddr); return -1; } while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) { pgtbl[i].owner = VDMA_PAGE_EMPTY; i++; } if (vdma_debug > 1) printk("vdma_free: freed %ld pages starting from %08lx\n", i-(laddr>>12),laddr); return 0; } /* * Map certain page(s) to another physical address. * Caller must have allocated the page(s) before. */ int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size) { VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; int first; int pages; if (laddr > 0xffffff) { if (vdma_debug) printk("vdma_map: Invalid logical address: %08lx\n",laddr); return -EINVAL; /* invalid logical address */ } if (paddr > 0x1fffffff) { if (vdma_debug) printk("vdma_map: Invalid physical address: %08lx\n",paddr); return -EINVAL; /* invalid physical address */ } pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1; first = laddr >> 12; if (vdma_debug) printk("vdma_remap: first=%x, pages=%x\n",first,pages); if (first+pages > VDMA_PGTBL_ENTRIES) { if (vdma_debug) printk("vdma_alloc: Invalid size: %08lx\n",size); return -EINVAL; } paddr &= ~(VDMA_PAGESIZE-1); while (pages > 0 && first < VDMA_PGTBL_ENTRIES) { if (pgtbl[first].owner != laddr) { if (vdma_debug) printk("Trying to remap other's pages.\n"); return -EPERM; /* not owner */ } pgtbl[first].frame = paddr; paddr += VDMA_PAGESIZE; first++; pages--; } /* update translation table */ r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0); if (vdma_debug > 2) { int i; pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1; first = laddr >> 12; printk("LADDR: "); for (i=first; i<first+pages; i++) printk("%08x ",i<<12); printk("\nPADDR: "); for (i=first; i<first+pages; i++) printk("%08x ",pgtbl[i].frame); printk("\nOWNER: "); for (i=first; i<first+pages; i++) printk("%08x ",pgtbl[i].owner); printk("\n"); } return 0; } /* * Translate a physical address to a logical address. * This will return the logical address of the first * match. */ unsigned long vdma_phys2log(unsigned long paddr) { int i; int frame; VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; frame = paddr & ~(VDMA_PAGESIZE-1); for (i=0; i<VDMA_PGTBL_ENTRIES; i++) { if (pgtbl[i].frame == frame) break; } if (i == VDMA_PGTBL_ENTRIES) return 0xffffffff; return (i<<12) + (paddr & (VDMA_PAGESIZE-1)); } /* * Translate a logical DMA address to a physical address */ unsigned long vdma_log2phys(unsigned long laddr) { VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE-1)); } /* * Initialize the pagetable with a one-to-one mapping of * the first 16 Mbytes of main memory and declare all * entries to be unused. Using this method will at least * allow some early device driver operations to work. */ static void vdma_pgtbl_init(void) { int i; unsigned long paddr = 0; VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start; for (i=0; i<VDMA_PGTBL_ENTRIES; i++) { pgtbl[i].frame = paddr; pgtbl[i].owner = VDMA_PAGE_EMPTY; paddr += VDMA_PAGESIZE; } /* vdma_stats(); */ } /* * Print DMA statistics */ void vdma_stats(void) { int i; printk("vdma_stats: CONFIG: %08x\n", r4030_read_reg32(JAZZ_R4030_CONFIG)); printk("R4030 translation table base: %08x\n", r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE)); printk("R4030 translation table limit: %08x\n", r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM)); printk("vdma_stats: INV_ADDR: %08x\n", r4030_read_reg32(JAZZ_R4030_INV_ADDR)); printk("vdma_stats: R_FAIL_ADDR: %08x\n", r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR)); printk("vdma_stats: M_FAIL_ADDR: %08x\n", r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR)); printk("vdma_stats: IRQ_SOURCE: %08x\n", r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE)); printk("vdma_stats: I386_ERROR: %08x\n", r4030_read_reg32(JAZZ_R4030_I386_ERROR)); printk("vdma_chnl_modes: "); for (i=0; i<8; i++) printk("%04x ", (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(i<<5))); printk("\n"); printk("vdma_chnl_enables: "); for (i=0; i<8; i++) printk("%04x ", (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(i<<5))); printk("\n"); } /* * DMA transfer functions */ /* * Enable a DMA channel. Also clear any error conditions. */ void vdma_enable(int channel) { int status; if (vdma_debug) printk("vdma_enable: channel %d\n",channel); /* * Check error conditions first */ status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)); if (status & 0x400) printk("VDMA: Channel %d: Address error!\n",channel); if (status & 0x200) printk("VDMA: Channel %d: Memory error!\n",channel); /* * Clear all interrupt flags */ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5), R4030_TC_INTR | R4030_MEM_INTR | R4030_ADDR_INTR); /* * Enable the desired channel */ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5), r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) | R4030_CHNL_ENABLE); } /* * Disable a DMA channel */ void vdma_disable(int channel) { if (vdma_debug) { int status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)); printk("vdma_disable: channel %d\n",channel); printk("VDMA: channel %d status: %04x (%s) mode: " "%02x addr: %06x count: %06x\n", channel,status,((status & 0x600) ? "ERROR" : "OK"), (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5)), (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5)), (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5))); } r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5), r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) & ~R4030_CHNL_ENABLE); /* * After disabling a DMA channel a remote bus register should be * read to ensure that the current DMA acknowledge cycle is completed. */ *((volatile unsigned int *)JAZZ_DUMMY_DEVICE); } /* * Set DMA mode. This function accepts the mode values used * to set a PC-style DMA controller. For the SCSI and FDC * channels, we also set the default modes each time we're * called. * NOTE: The FAST and BURST dma modes are supported by the * R4030 Rev. 2 and PICA chipsets only. I leave them disabled * for now. */ void vdma_set_mode(int channel, int mode) { if (vdma_debug) printk("vdma_set_mode: channel %d, mode 0x%x\n",channel,mode); switch(channel) { case JAZZ_SCSI_DMA: /* scsi */ r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5), /* R4030_MODE_FAST | */ /* R4030_MODE_BURST | */ R4030_MODE_INTR_EN | R4030_MODE_WIDTH_16 | R4030_MODE_ATIME_80); break; case JAZZ_FLOPPY_DMA: /* floppy */ r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5), /* R4030_MODE_FAST | */ /* R4030_MODE_BURST | */ R4030_MODE_INTR_EN | R4030_MODE_WIDTH_8 | R4030_MODE_ATIME_120); break; case JAZZ_AUDIOL_DMA: case JAZZ_AUDIOR_DMA: printk("VDMA: Audio DMA not supported yet.\n"); break; default: printk("VDMA: vdma_set_mode() called with unsupported channel %d!\n", channel); } switch(mode) { case DMA_MODE_READ: r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5), r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) & ~R4030_CHNL_WRITE); break; case DMA_MODE_WRITE: r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5), r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) | R4030_CHNL_WRITE); break; default: printk("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",mode); } } /* * Set Transfer Address */ void vdma_set_addr(int channel, long addr) { if (vdma_debug) printk("vdma_set_addr: channel %d, addr %lx\n",channel,addr); r4030_write_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5),addr); } /* * Set Transfer Count */ void vdma_set_count(int channel, int count) { if (vdma_debug) printk("vdma_set_count: channel %d, count %08x\n",channel,(unsigned)count); r4030_write_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5),count); } /* * Get Residual */ int vdma_get_residue(int channel) { int residual; residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5)); if (vdma_debug) printk("vdma_get_residual: channel %d: residual=%d\n",channel,residual); return residual; } |