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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 | // SPDX-License-Identifier: GPL-2.0-or-later /* * MPC8536 DS Device Tree Source * * Copyright 2008, 2011 Freescale Semiconductor, Inc. */ /include/ "mpc8536si-pre.dtsi" / { model = "fsl,mpc8536ds"; compatible = "fsl,mpc8536ds"; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; PowerPC,8536@0 { device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; }; }; memory { device_type = "memory"; reg = <0 0 0 0>; // Filled by U-Boot }; lbc: localbus@ffe05000 { reg = <0 0xffe05000 0 0x1000>; ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 0x2 0x0 0x0 0xffa00000 0x00040000 0x3 0x0 0x0 0xffdf0000 0x00008000>; }; board_soc: soc: soc@ffe00000 { ranges = <0x0 0 0xffe00000 0x100000>; }; pci0: pci@ffe08000 { reg = <0 0xffe08000 0 0x1000>; ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>; clock-frequency = <66666666>; interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x11 J17 Slot 1 */ 0x8800 0 0 1 &mpic 1 1 0 0 0x8800 0 0 2 &mpic 2 1 0 0 0x8800 0 0 3 &mpic 3 1 0 0 0x8800 0 0 4 &mpic 4 1 0 0>; }; pci1: pcie@ffe09000 { reg = <0 0xffe09000 0 0x1000>; ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x98000000 0x02000000 0 0x98000000 0 0x08000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; pci2: pcie@ffe0a000 { reg = <0 0xffe0a000 0 0x1000>; ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x90000000 0x02000000 0 0x90000000 0 0x08000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; pci3: pcie@ffe0b000 { reg = <0 0xffe0b000 0 0x1000>; ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xa0000000 0x02000000 0 0xa0000000 0 0x20000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00100000>; }; }; }; /include/ "mpc8536si-post.dtsi" /include/ "mpc8536ds.dtsi" |