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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 | // SPDX-License-Identifier: GPL-2.0-or-later /* * P2020 RDB Device Tree Source * * Copyright 2009-2012 Freescale Semiconductor Inc. */ /include/ "p2020si-pre.dtsi" / { model = "fsl,P2020RDB"; compatible = "fsl,P2020RDB"; aliases { ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; pci1 = &pci1; }; memory { device_type = "memory"; }; lbc: localbus@ffe05000 { reg = <0 0xffe05000 0 0x1000>; /* NOR and NAND Flashes */ ranges = <0x0 0x0 0x0 0xef000000 0x01000000 0x1 0x0 0x0 0xffa00000 0x00040000 0x2 0x0 0x0 0xffb00000 0x00020000>; nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x1000000>; bank-width = <2>; device-width = <1>; partition@0 { /* This location must not be altered */ /* 256KB for Vitesse 7385 Switch firmware */ reg = <0x0 0x00040000>; label = "NOR (RO) Vitesse-7385 Firmware"; read-only; }; partition@40000 { /* 256KB for DTB Image */ reg = <0x00040000 0x00040000>; label = "NOR (RO) DTB Image"; read-only; }; partition@80000 { /* 3.5 MB for Linux Kernel Image */ reg = <0x00080000 0x00380000>; label = "NOR (RO) Linux Kernel Image"; read-only; }; partition@400000 { /* 11MB for JFFS2 based Root file System */ reg = <0x00400000 0x00b00000>; label = "NOR (RW) JFFS2 Root File System"; }; partition@f00000 { /* This location must not be altered */ /* 512KB for u-boot Bootloader Image */ /* 512KB for u-boot Environment Variables */ reg = <0x00f00000 0x00100000>; label = "NOR (RO) U-Boot Image"; read-only; }; }; nand@1,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p2020-fcm-nand", "fsl,elbc-fcm-nand"; reg = <0x1 0x0 0x40000>; partition@0 { /* This location must not be altered */ /* 1MB for u-boot Bootloader Image */ reg = <0x0 0x00100000>; label = "NAND (RO) U-Boot Image"; read-only; }; partition@100000 { /* 1MB for DTB Image */ reg = <0x00100000 0x00100000>; label = "NAND (RO) DTB Image"; read-only; }; partition@200000 { /* 4MB for Linux Kernel Image */ reg = <0x00200000 0x00400000>; label = "NAND (RO) Linux Kernel Image"; read-only; }; partition@600000 { /* 4MB for Compressed Root file System Image */ reg = <0x00600000 0x00400000>; label = "NAND (RO) Compressed RFS Image"; read-only; }; partition@a00000 { /* 7MB for JFFS2 based Root file System */ reg = <0x00a00000 0x00700000>; label = "NAND (RW) JFFS2 Root File System"; }; partition@1100000 { /* 15MB for JFFS2 based Root file System */ reg = <0x01100000 0x00f00000>; label = "NAND (RW) Writable User area"; }; }; L2switch@2,0 { #address-cells = <1>; #size-cells = <1>; compatible = "vitesse-7385"; reg = <0x2 0x0 0x20000>; }; }; soc: soc@ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; i2c@3000 { rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; }; }; spi@7000 { flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spansion,s25sl12801", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; partition@0 { /* 512KB for u-boot Bootloader Image */ reg = <0x0 0x00080000>; label = "SPI (RO) U-Boot Image"; read-only; }; partition@80000 { /* 512KB for DTB Image */ reg = <0x00080000 0x00080000>; label = "SPI (RO) DTB Image"; read-only; }; partition@100000 { /* 4MB for Linux Kernel Image */ reg = <0x00100000 0x00400000>; label = "SPI (RO) Linux Kernel Image"; read-only; }; partition@500000 { /* 4MB for Compressed RFS Image */ reg = <0x00500000 0x00400000>; label = "SPI (RO) Compressed RFS Image"; read-only; }; partition@900000 { /* 7MB for JFFS2 based RFS */ reg = <0x00900000 0x00700000>; label = "SPI (RW) JFFS2 RFS"; }; }; }; usb@22000 { phy_type = "ulpi"; dr_mode = "host"; }; mdio@24520 { phy0: ethernet-phy@0 { interrupts = <3 1 0 0>; reg = <0x0>; }; phy1: ethernet-phy@1 { interrupts = <3 1 0 0>; reg = <0x1>; }; tbi-phy@2 { device_type = "tbi-phy"; reg = <0x2>; }; }; mdio@25520 { tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; mdio@26520 { status = "disabled"; }; ptp_clock@24e00 { fsl,tclk-period = <5>; fsl,tmr-prsc = <200>; fsl,tmr-add = <0xCCCCCCCD>; fsl,tmr-fiper1 = <0x3B9AC9FB>; fsl,tmr-fiper2 = <0x0001869B>; fsl,max-adj = <249999999>; }; enet0: ethernet@24000 { fixed-link = <1 1 1000 0 0>; phy-connection-type = "rgmii-id"; }; enet1: ethernet@25000 { tbi-handle = <&tbi0>; phy-handle = <&phy0>; phy-connection-type = "sgmii"; }; enet2: ethernet@26000 { phy-handle = <&phy1>; phy-connection-type = "rgmii-id"; }; }; pci0: pcie@ffe08000 { reg = <0 0xffe08000 0 0x1000>; status = "disabled"; }; pci1: pcie@ffe09000 { reg = <0 0xffe09000 0 0x1000>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; pcie@0 { ranges = <0x2000000 0x0 0xa0000000 0x2000000 0x0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 0x0 0x100000>; }; }; pci2: pcie@ffe0a000 { reg = <0 0xffe0a000 0 0x1000>; ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; pcie@0 { ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 0x0 0x100000>; }; }; }; /include/ "p2020si-post.dtsi" |