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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/leds/common.h> / { chosen { stdout-path = &uart2; }; aliases { can0 = &can1; can1 = &can2; mdio-gpio0 = &mdio; nand = &gpmi; rtc0 = &i2c_rtc; rtc1 = &snvs; usb0 = &usbh1; usb1 = &usbotg; }; iio-hwmon { compatible = "iio-hwmon"; io-channels = <&adc 0>, /* 24V */ <&adc 1>; /* temperature */ }; leds { compatible = "gpio-leds"; led-0 { label = "D1"; gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; function = LED_FUNCTION_STATUS; default-state = "on"; linux,default-trigger = "heartbeat"; }; led-1 { label = "D2"; gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-2 { label = "D3"; gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; mdio: mdio { compatible = "microchip,mdio-smi0"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mdio>; #address-cells = <1>; #size-cells = <0>; gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>, <&gpio1 22 GPIO_ACTIVE_HIGH>; switch@0 { compatible = "microchip,ksz8873"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; interrupt-parent = <&gpio3>; interrupt = <30 IRQ_TYPE_LEVEL_HIGH>; reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; reg = <0>; ports { #address-cells = <1>; #size-cells = <0>; ports@0 { reg = <0>; phy-mode = "internal"; label = "lan1"; }; ports@1 { reg = <1>; phy-mode = "internal"; label = "lan2"; }; ports@2 { reg = <2>; label = "cpu"; ethernet = <&fec>; phy-mode = "rmii"; fixed-link { speed = <100>; full-duplex; }; }; }; }; }; clk50m_phy: phy-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; clock-output-names = "enet_ref_pad"; }; reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; vin-supply = <®_5v0>; regulator-name = "3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; reg_5v0: regulator-5v0 { compatible = "regulator-fixed"; regulator-name = "5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; reg_24v0: regulator-24v0 { compatible = "regulator-fixed"; regulator-name = "24v0"; regulator-min-microvolt = <24000000>; regulator-max-microvolt = <24000000>; }; reg_can1_stby: regulator-can1-stby { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_stby>; regulator-name = "can1-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; }; reg_can2_stby: regulator-can2-stby { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can2_stby>; regulator-name = "can2-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; }; reg_tft_vcom: regulator-tft-vcom { compatible = "pwm-regulator"; pwms = <&pwm3 0 20000 0>; regulator-name = "tft_vcom"; regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; regulator-always-on; voltage-table = <3600000 26>; }; reg_vcc_mmc: regulator-vcc-mmc { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_vcc_mmc>; vin-supply = <®_3v3>; regulator-name = "mmc_vcc_supply"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; enable-active-high; startup-delay-us = <100>; }; reg_vcc_mmc_io: regulator-vcc-mmc-io { compatible = "regulator-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_vcc_mmc_io>; vin-supply = <®_5v0>; regulator-name = "mmc_io_supply"; regulator-type = "voltage"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; enable-active-high; states = <1800000 0x1>, <3300000 0x0>; startup-delay-us = <100>; }; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1>; xceiver-supply = <®_can1_stby>; status = "okay"; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can2>; xceiver-supply = <®_can2_stby>; status = "okay"; }; &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; status = "okay"; flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <54000000>; reg = <0>; }; }; &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; status = "okay"; adc: adc@0 { compatible = "microchip,mcp3002"; reg = <0>; vref-supply = <®_3v3>; spi-max-frequency = <1000000>; #io-channel-cells = <1>; }; }; &clks { clocks = <&clk50m_phy>; clock-names = "enet_ref_pad"; assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; assigned-clock-parents = <&clk50m_phy>; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; phy-supply = <®_3v3>; status = "okay"; fixed-link { speed = <100>; full-duplex; }; }; &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; nand-on-flash-bbt; #address-cells = <1>; #size-cells = <0>; status = "okay"; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clock-frequency = <400000>; status = "okay"; i2c_rtc: rtc@51 { compatible = "nxp,pcf85063"; reg = <0x51>; quartz-load-femtofarads = <12500>; }; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; #pwm-cells = <2>; status = "okay"; }; &pwm3 { /* used for LCD contrast control */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &usbh1 { vbus-supply = <®_5v0>; disable-over-current; status = "okay"; }; /* no usbh2 */ &usbphynop1 { status = "disabled"; }; /* no usbh3 */ &usbphynop2 { status = "disabled"; }; &usbotg { vbus-supply = <®_5v0>; disable-over-current; status = "okay"; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; cap-power-off-card; full-pwr-cycle; bus-width = <4>; max-frequency = <50000000>; cap-sd-highspeed; sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; mmc-ddr-1_8v; vmmc-supply = <®_vcc_mmc>; vqmmc-supply = <®_vcc_mmc_io>; status = "okay"; }; &iomuxc { pinctrl_can1: can1grp { fsl,pins = < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x3008 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b000 >; }; pinctrl_can1_stby: can1stbygrp { fsl,pins = < MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x13008 >; }; pinctrl_can2: can2grp { fsl,pins = < MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000 >; }; pinctrl_can2_stby: can2stbygrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x13008 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb1 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb1 /* *no* external pull up */ MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x58 >; }; pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0xb1 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0xb1 /* external pull up */ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x58 >; }; pinctrl_enet: enetgrp { fsl,pins = < /* RMII 50 MHz */ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x58 /* GPIO for "link active" */ MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x3038 >; }; pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < /* external 10 k pull up */ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x40010878 /* external 10 k pull up */ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x40010878 >; }; pinctrl_mdio: mdiogrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x100b1 MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0xb1 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_GPIO_1__PWM2_OUT 0x58 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x58 >; }; pinctrl_switch: switchgrp { fsl,pins = < MX6QDL_PAD_EIM_D30__GPIO3_IO30 0xb0 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < /* SoC internal pull up required */ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 /* SoC internal pull up required */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b040 /* SoC internal pull up required */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b040 >; }; pinctrl_vcc_mmc: vccmmcgrp { fsl,pins = < MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x58 >; }; pinctrl_vcc_mmc_io: vccmmciogrp { fsl,pins = < MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x58 >; }; }; |