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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix */ #include "imx53.dtsi" / { model = "TQ TQMa53"; compatible = "tq,tqma53", "fsl,imx53"; memory@70000000 { device_type = "memory"; reg = <0x70000000 0x40000000>; /* Up to 1GiB */ }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_3p3v: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; }; &esdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc2>, <&pinctrl_esdhc2_cdwp>; vmmc-supply = <®_3p3v>; wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; status = "disabled"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "disabled"; }; &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>, <&gpio3 24 GPIO_ACTIVE_LOW>, <&gpio3 25 GPIO_ACTIVE_LOW>; status = "disabled"; }; &esdhc3 { /* EMMC */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc3>; vmmc-supply = <®_3p3v>; non-removable; bus-width = <8>; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx53-tqma53 { pinctrl_hog: hoggrp { fsl,pins = < MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */ MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */ MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */ MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */ MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */ MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */ MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */ MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* #SYSTEM_DOWN */ MX53_PAD_GPIO_3__GPIO1_3 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */ MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 /* LCD_CONTRAST */ >; }; pinctrl_audmux: audmuxgrp { fsl,pins = < MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 >; }; pinctrl_can1: can1grp { fsl,pins = < MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000 MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000 >; }; pinctrl_can2: can2grp { fsl,pins = < MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 >; }; pinctrl_cspi: cspigrp { fsl,pins = < MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5 MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5 MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 >; }; pinctrl_esdhc2: esdhc2grp { fsl,pins = < MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 >; }; pinctrl_esdhc2_cdwp: esdhc2cdwp { fsl,pins = < MX53_PAD_GPIO_4__GPIO1_4 0x80000000 /* SD2_CD */ MX53_PAD_GPIO_2__GPIO1_2 0x80000000 /* SD2_WP */ >; }; pinctrl_esdhc3: esdhc3grp { fsl,pins = < MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 >; }; pinctrl_fec: fecgrp { fsl,pins = < MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 >; }; }; }; &pwm1 { #pwm-cells = <2>; }; &pwm2 { #pwm-cells = <2>; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; uart-has-rtscts; status = "disabled"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "disabled"; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1>; status = "disabled"; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can2>; status = "disabled"; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "disabled"; }; &cspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_cspi>; cs-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>, <&gpio1 19 GPIO_ACTIVE_LOW>, <&gpio1 21 GPIO_ACTIVE_LOW>; status = "disabled"; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; pmic: mc34708@8 { compatible = "fsl,mc34708"; reg = <0x8>; fsl,mc13xxx-uses-rtc; interrupt-parent = <&gpio2>; interrupts = <6 4>; /* PATA_DATA6, active high */ }; sensor1: lm75@48 { compatible = "lm75"; reg = <0x48>; }; eeprom: eeprom@50 { compatible = "atmel,24c64"; pagesize = <32>; reg = <0x50>; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; status = "disabled"; }; |