Linux Audio

Check our new training course

Embedded Linux Audio

Check our new training course
with Creative Commons CC-BY-SA
lecture materials

Bootlin logo

Elixir Cross Referencer

Open Menu / Documentation / devicetree / bindings / phy / socionext,uniphier-usb3ss-phy.yaml
Loading...
  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Socionext UniPhier USB3 Super-Speed (SS) PHY

description: |
  This describes the devicetree bindings for PHY interfaces built into
  USB3 controller implemented on Socionext UniPhier SoCs.
  Although the controller includes High-Speed PHY and Super-Speed PHY,
  this describes about Super-Speed PHY.

maintainers:
  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

properties:
  compatible:
    enum:
      - socionext,uniphier-pro4-usb3-ssphy
      - socionext,uniphier-pro5-usb3-ssphy
      - socionext,uniphier-pxs2-usb3-ssphy
      - socionext,uniphier-ld20-usb3-ssphy
      - socionext,uniphier-pxs3-usb3-ssphy
      - socionext,uniphier-nx1-usb3-ssphy

  reg:
    maxItems: 1

  "#phy-cells":
    const: 0

  clocks:
    minItems: 2
    maxItems: 3

  clock-names: true

  resets:
    maxItems: 2

  reset-names: true

  vbus-supply:
    description: A phandle to the regulator for USB VBUS, only for USB host

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - socionext,uniphier-pro4-usb3-ssphy
              - socionext,uniphier-pro5-usb3-ssphy
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: gio
            - const: link
        resets:
          minItems: 2
          maxItems: 2
        reset-names:
          items:
            - const: gio
            - const: link
  - if:
      properties:
        compatible:
          contains:
            enum:
              - socionext,uniphier-pxs2-usb3-ssphy
              - socionext,uniphier-ld20-usb3-ssphy
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: link
            - const: phy
        resets:
          minItems: 2
          maxItems: 2
        reset-names:
          items:
            - const: link
            - const: phy
  - if:
      properties:
        compatible:
          contains:
            enum:
              - socionext,uniphier-pxs3-usb3-ssphy
              - socionext,uniphier-nx1-usb3-ssphy
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 3
        clock-names:
          minItems: 2
          items:
            - const: link
            - const: phy
            - const: phy-ext
        resets:
          minItems: 2
          maxItems: 2
        reset-names:
          items:
            - const: link
            - const: phy

required:
  - compatible
  - reg
  - "#phy-cells"
  - clocks
  - clock-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    usb_ssphy0: phy@300 {
        compatible = "socionext,uniphier-ld20-usb3-ssphy";
        reg = <0x300 0x10>;
        #phy-cells = <0>;
        clock-names = "link", "phy";
        clocks = <&sys_clk 14>, <&sys_clk 16>;
        reset-names = "link", "phy";
        resets = <&sys_rst 14>, <&sys_rst 16>;
        vbus-supply = <&usb_vbus0>;
    };