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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 | // SPDX-License-Identifier: GPL-2.0-only /* * cobalt I2C functions * * Derived from cx18-i2c.c * * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates. * All rights reserved. */ #include "cobalt-driver.h" #include "cobalt-i2c.h" struct cobalt_i2c_regs { /* Clock prescaler register lo-byte */ u8 prerlo; u8 dummy0[3]; /* Clock prescaler register high-byte */ u8 prerhi; u8 dummy1[3]; /* Control register */ u8 ctr; u8 dummy2[3]; /* Transmit/Receive register */ u8 txr_rxr; u8 dummy3[3]; /* Command and Status register */ u8 cr_sr; u8 dummy4[3]; }; /* CTR[7:0] - Control register */ /* I2C Core enable bit */ #define M00018_CTR_BITMAP_EN_MSK (1 << 7) /* I2C Core interrupt enable bit */ #define M00018_CTR_BITMAP_IEN_MSK (1 << 6) /* CR[7:0] - Command register */ /* I2C start condition */ #define M00018_CR_BITMAP_STA_MSK (1 << 7) /* I2C stop condition */ #define M00018_CR_BITMAP_STO_MSK (1 << 6) /* I2C read from slave */ #define M00018_CR_BITMAP_RD_MSK (1 << 5) /* I2C write to slave */ #define M00018_CR_BITMAP_WR_MSK (1 << 4) /* I2C ack */ #define M00018_CR_BITMAP_ACK_MSK (1 << 3) /* I2C Interrupt ack */ #define M00018_CR_BITMAP_IACK_MSK (1 << 0) /* SR[7:0] - Status register */ /* Receive acknowledge from slave */ #define M00018_SR_BITMAP_RXACK_MSK (1 << 7) /* Busy, I2C bus busy (as defined by start / stop bits) */ #define M00018_SR_BITMAP_BUSY_MSK (1 << 6) /* Arbitration lost - core lost arbitration */ #define M00018_SR_BITMAP_AL_MSK (1 << 5) /* Transfer in progress */ #define M00018_SR_BITMAP_TIP_MSK (1 << 1) /* Interrupt flag */ #define M00018_SR_BITMAP_IF_MSK (1 << 0) /* Frequency, in Hz */ #define I2C_FREQUENCY 400000 #define ALT_CPU_FREQ 83333333 static struct cobalt_i2c_regs __iomem * cobalt_i2c_regs(struct cobalt *cobalt, unsigned idx) { switch (idx) { case 0: default: return (struct cobalt_i2c_regs __iomem *) (cobalt->bar1 + COBALT_I2C_0_BASE); case 1: return (struct cobalt_i2c_regs __iomem *) (cobalt->bar1 + COBALT_I2C_1_BASE); case 2: return (struct cobalt_i2c_regs __iomem *) (cobalt->bar1 + COBALT_I2C_2_BASE); case 3: return (struct cobalt_i2c_regs __iomem *) (cobalt->bar1 + COBALT_I2C_3_BASE); case 4: return (struct cobalt_i2c_regs __iomem *) (cobalt->bar1 + COBALT_I2C_HSMA_BASE); } } /* Do low-level i2c byte transfer. * Returns -1 in case of an error or 0 otherwise. */ static int cobalt_tx_bytes(struct cobalt_i2c_regs __iomem *regs, struct i2c_adapter *adap, bool start, bool stop, u8 *data, u16 len) { unsigned long start_time; int status; int cmd; int i; for (i = 0; i < len; i++) { /* Setup data */ iowrite8(data[i], ®s->txr_rxr); /* Setup command */ if (i == 0 && start) { /* Write + Start */ cmd = M00018_CR_BITMAP_WR_MSK | M00018_CR_BITMAP_STA_MSK; } else if (i == len - 1 && stop) { /* Write + Stop */ cmd = M00018_CR_BITMAP_WR_MSK | M00018_CR_BITMAP_STO_MSK; } else { /* Write only */ cmd = M00018_CR_BITMAP_WR_MSK; } /* Execute command */ iowrite8(cmd, ®s->cr_sr); /* Wait for transfer to complete (TIP = 0) */ start_time = jiffies; status = ioread8(®s->cr_sr); while (status & M00018_SR_BITMAP_TIP_MSK) { if (time_after(jiffies, start_time + adap->timeout)) return -ETIMEDOUT; cond_resched(); status = ioread8(®s->cr_sr); } /* Verify ACK */ if (status & M00018_SR_BITMAP_RXACK_MSK) { /* NO ACK! */ return -EIO; } /* Verify arbitration */ if (status & M00018_SR_BITMAP_AL_MSK) { /* Arbitration lost! */ return -EIO; } } return 0; } /* Do low-level i2c byte read. * Returns -1 in case of an error or 0 otherwise. */ static int cobalt_rx_bytes(struct cobalt_i2c_regs __iomem *regs, struct i2c_adapter *adap, bool start, bool stop, u8 *data, u16 len) { unsigned long start_time; int status; int cmd; int i; for (i = 0; i < len; i++) { /* Setup command */ if (i == 0 && start) { /* Read + Start */ cmd = M00018_CR_BITMAP_RD_MSK | M00018_CR_BITMAP_STA_MSK; } else if (i == len - 1 && stop) { /* Read + Stop */ cmd = M00018_CR_BITMAP_RD_MSK | M00018_CR_BITMAP_STO_MSK; } else { /* Read only */ cmd = M00018_CR_BITMAP_RD_MSK; } /* Last byte to read, no ACK */ if (i == len - 1) cmd |= M00018_CR_BITMAP_ACK_MSK; /* Execute command */ iowrite8(cmd, ®s->cr_sr); /* Wait for transfer to complete (TIP = 0) */ start_time = jiffies; status = ioread8(®s->cr_sr); while (status & M00018_SR_BITMAP_TIP_MSK) { if (time_after(jiffies, start_time + adap->timeout)) return -ETIMEDOUT; cond_resched(); status = ioread8(®s->cr_sr); } /* Verify arbitration */ if (status & M00018_SR_BITMAP_AL_MSK) { /* Arbitration lost! */ return -EIO; } /* Store data */ data[i] = ioread8(®s->txr_rxr); } return 0; } /* Generate stop condition on i2c bus. * The m00018 stop isn't doing the right thing (wrong timing). * So instead send a start condition, 8 zeroes and a stop condition. */ static int cobalt_stop(struct cobalt_i2c_regs __iomem *regs, struct i2c_adapter *adap) { u8 data = 0; return cobalt_tx_bytes(regs, adap, true, true, &data, 1); } static int cobalt_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct cobalt_i2c_data *data = adap->algo_data; struct cobalt_i2c_regs __iomem *regs = data->regs; struct i2c_msg *pmsg; unsigned short flags; int ret = 0; int i, j; for (i = 0; i < num; i++) { int stop = (i == num - 1); pmsg = &msgs[i]; flags = pmsg->flags; if (!(pmsg->flags & I2C_M_NOSTART)) { u8 addr = pmsg->addr << 1; if (flags & I2C_M_RD) addr |= 1; if (flags & I2C_M_REV_DIR_ADDR) addr ^= 1; for (j = 0; j < adap->retries; j++) { ret = cobalt_tx_bytes(regs, adap, true, false, &addr, 1); if (!ret) break; cobalt_stop(regs, adap); } if (ret < 0) return ret; ret = 0; } if (pmsg->flags & I2C_M_RD) { /* read bytes into buffer */ ret = cobalt_rx_bytes(regs, adap, false, stop, pmsg->buf, pmsg->len); if (ret < 0) goto bailout; } else { /* write bytes from buffer */ ret = cobalt_tx_bytes(regs, adap, false, stop, pmsg->buf, pmsg->len); if (ret < 0) goto bailout; } } ret = i; bailout: if (ret < 0) cobalt_stop(regs, adap); return ret; } static u32 cobalt_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } /* template for i2c-bit-algo */ static const struct i2c_adapter cobalt_i2c_adap_template = { .name = "cobalt i2c driver", .algo = NULL, /* set by i2c-algo-bit */ .algo_data = NULL, /* filled from template */ .owner = THIS_MODULE, }; static const struct i2c_algorithm cobalt_algo = { .master_xfer = cobalt_xfer, .functionality = cobalt_func, }; /* init + register i2c algo-bit adapter */ int cobalt_i2c_init(struct cobalt *cobalt) { int i, err; int status; int prescale; unsigned long start_time; cobalt_dbg(1, "i2c init\n"); /* Define I2C clock prescaler */ prescale = ((ALT_CPU_FREQ) / (5 * I2C_FREQUENCY)) - 1; for (i = 0; i < COBALT_NUM_ADAPTERS; i++) { struct cobalt_i2c_regs __iomem *regs = cobalt_i2c_regs(cobalt, i); struct i2c_adapter *adap = &cobalt->i2c_adap[i]; /* Disable I2C */ iowrite8(M00018_CTR_BITMAP_EN_MSK, ®s->cr_sr); iowrite8(0, ®s->ctr); iowrite8(0, ®s->cr_sr); start_time = jiffies; do { if (time_after(jiffies, start_time + HZ)) { if (cobalt_ignore_err) { adap->dev.parent = NULL; return 0; } return -ETIMEDOUT; } status = ioread8(®s->cr_sr); } while (status & M00018_SR_BITMAP_TIP_MSK); /* Disable I2C */ iowrite8(0, ®s->ctr); iowrite8(0, ®s->cr_sr); /* Calculate i2c prescaler */ iowrite8(prescale & 0xff, ®s->prerlo); iowrite8((prescale >> 8) & 0xff, ®s->prerhi); /* Enable I2C, interrupts disabled */ iowrite8(M00018_CTR_BITMAP_EN_MSK, ®s->ctr); /* Setup algorithm for adapter */ cobalt->i2c_data[i].cobalt = cobalt; cobalt->i2c_data[i].regs = regs; *adap = cobalt_i2c_adap_template; adap->algo = &cobalt_algo; adap->algo_data = &cobalt->i2c_data[i]; adap->retries = 3; sprintf(adap->name + strlen(adap->name), " #%d-%d", cobalt->instance, i); i2c_set_adapdata(adap, &cobalt->v4l2_dev); adap->dev.parent = &cobalt->pci_dev->dev; err = i2c_add_adapter(adap); if (err) { if (cobalt_ignore_err) { adap->dev.parent = NULL; return 0; } while (i--) i2c_del_adapter(&cobalt->i2c_adap[i]); return err; } cobalt_info("registered bus %s\n", adap->name); } return 0; } void cobalt_i2c_exit(struct cobalt *cobalt) { int i; cobalt_dbg(1, "i2c exit\n"); for (i = 0; i < COBALT_NUM_ADAPTERS; i++) { cobalt_err("unregistered bus %s\n", cobalt->i2c_adap[i].name); i2c_del_adapter(&cobalt->i2c_adap[i]); } } |