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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 | Marvell NAND Flash Controller (NFC) Required properties: - compatible: can be one of the following: * "marvell,armada-8k-nand-controller" * "marvell,armada370-nand-controller" * "marvell,pxa3xx-nand-controller" * "marvell,armada-8k-nand" (deprecated) * "marvell,armada370-nand" (deprecated) * "marvell,pxa3xx-nand" (deprecated) Compatibles marked deprecated support only the old bindings described at the bottom. - reg: NAND flash controller memory area. - #address-cells: shall be set to 1. Encode the NAND CS. - #size-cells: shall be set to 0. - interrupts: shall define the NAND controller interrupt. - clocks: shall reference the NAND controller clocks, the second one is is only needed for the Armada 7K/8K SoCs - clock-names: mandatory if there is a second clock, in this case there should be one clock named "core" and another one named "reg" - marvell,system-controller: Set to retrieve the syscon node that handles NAND controller related registers (only required with the "marvell,armada-8k-nand[-controller]" compatibles). Optional properties: - label: see partition.txt. New platforms shall omit this property. - dmas: shall reference DMA channel associated to the NAND controller. This property is only used with "marvell,pxa3xx-nand[-controller]" compatible strings. - dma-names: shall be "rxtx". This property is only used with "marvell,pxa3xx-nand[-controller]" compatible strings. Optional children nodes: Children nodes represent the available NAND chips. Required properties: - reg: shall contain the native Chip Select ids (0-3). - nand-rb: see nand-controller.yaml (0-1). Optional properties: - marvell,nand-keep-config: orders the driver not to take the timings from the core and leaving them completely untouched. Bootloader timings will then be used. - label: MTD name. - nand-on-flash-bbt: see nand-controller.yaml. - nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified. - nand-ecc-algo: see nand-controller.yaml. This property is essentially useful when not using hardware ECC. Howerver, it may be added when using hardware ECC for clarification but will be ignored by the driver because ECC mode is chosen depending on the page size and the strength required by the NAND chip. This value may be overwritten with nand-ecc-strength property. - nand-ecc-strength: see nand-controller.yaml. - nand-ecc-step-size: see nand-controller.yaml. Marvell's NAND flash controller does use fixed strength (1-bit for Hamming, 16-bit for BCH), so the actual step size will shrink or grow in order to fit the required strength. Step sizes are not completely random for all and follow certain patterns described in AN-379, "Marvell SoC NFC ECC". See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on generic bindings. Example: nand_controller: nand-controller@d0000 { compatible = "marvell,armada370-nand-controller"; reg = <0xd0000 0x54>; #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&coredivclk 0>; nand@0 { reg = <0>; label = "main-storage"; nand-rb = <0>; nand-ecc-mode = "hw"; marvell,nand-keep-config; nand-on-flash-bbt; nand-ecc-strength = <4>; nand-ecc-step-size = <512>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "Rootfs"; reg = <0x00000000 0x40000000>; }; }; }; }; Note on legacy bindings: One can find, in not-updated device trees, bindings slightly different than described above with other properties described below as well as the partitions node at the root of a so called "nand" node (without clear controller/chip separation). Legacy properties: - marvell,nand-enable-arbiter: To enable the arbiter, all boards blindly used it, this bit was set by the bootloader for many boards and even if it is marked reserved in several datasheets, it might be needed to set it (otherwise it is harmless) so whether or not this property is set, the bit is selected by the driver. - num-cs: Number of chip-select lines to use, all boards blindly set 1 to this and for a reason, other values would have failed. The value of this property is ignored. Example: nand0: nand@43100000 { compatible = "marvell,pxa3xx-nand"; reg = <0x43100000 90>; interrupts = <45>; dmas = <&pdma 97 0>; dma-names = "rxtx"; #address-cells = <1>; marvell,nand-keep-config; marvell,nand-enable-arbiter; num-cs = <1>; /* Partitions (optional) */ }; |