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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Device Tree file for Freescale LS2080A RDB Board. * * Copyright 2016 Freescale Semiconductor, Inc. * Copyright 2017-2020 NXP * * Abhimanyu Saini <abhimanyu.saini@nxp.com> * */ &esdhc { status = "okay"; }; &ifc { status = "okay"; #address-cells = <2>; #size-cells = <1>; ranges = <0x0 0x0 0x5 0x80000000 0x08000000 0x2 0x0 0x5 0x30000000 0x00010000 0x3 0x0 0x5 0x20000000 0x00010000>; nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; bank-width = <2>; device-width = <1>; }; nand@2,0 { compatible = "fsl,ifc-nand"; reg = <0x2 0x0 0x10000>; }; cpld@3,0 { reg = <0x3 0x0 0x10000>; compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis"; }; }; &i2c0 { status = "okay"; i2c-mux@75 { compatible = "nxp,pca9547"; reg = <0x75>; #address-cells = <1>; #size-cells = <0>; idle-state = <0>; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <0x01>; rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; /* IRQ_RTC_B -> IRQ06, active low */ interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>; }; }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <0x02>; ina220@40 { compatible = "ti,ina220"; reg = <0x40>; shunt-resistor = <500>; }; }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <0x3>; adt7481@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; }; }; }; &i2c1 { status = "disabled"; }; &i2c2 { status = "disabled"; }; &i2c3 { status = "disabled"; }; &dspi { status = "okay"; dflash0: flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "st,m25p80"; spi-max-frequency = <3000000>; reg = <0>; }; }; &qspi { status = "okay"; s25fs512s0: flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; }; }; &sata0 { status = "okay"; }; &sata1 { status = "okay"; }; &usb0 { status = "okay"; }; &usb1 { status = "okay"; }; |