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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 | // SPDX-License-Identifier: GPL-2.0+ OR MIT // // Copyright 2014 Soeren Moch <smoch@web.de> /dts-v1/; #include "imx6q.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> / { model = "TBS2910 Matrix ARM mini PC"; compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; chosen { stdout-path = &uart1; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x80000000>; }; fan { compatible = "gpio-fan"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_fan>; gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; gpio-fan,speed-map = <0 0 3000 1>; }; ir_recv { compatible = "gpio-ir-receiver"; gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ir>; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; blue { label = "blue_status_led"; gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; default-state = "keep"; }; }; reg_2p5v: regulator-2p5v { compatible = "regulator-fixed"; regulator-name = "2P5V"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; reg_5p0v: regulator-5p0v { compatible = "regulator-fixed"; regulator-name = "5P0V"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; sound-sgtl5000 { audio-codec = <&sgtl5000>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; compatible = "fsl,imx-audio-sgtl5000"; model = "On-board Codec"; mux-ext-port = <3>; mux-int-port = <1>; ssi-controller = <&ssi1>; }; sound-spdif { compatible = "fsl,imx-audio-spdif"; model = "On-board SPDIF"; spdif-controller = <&spdif>; spdif-out; }; }; &audmux { status = "okay"; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; status = "okay"; }; &hdmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hdmi>; ddc-i2c-bus = <&i2c2>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; sgtl5000: sgtl5000@a { clocks = <&clks IMX6QDL_CLK_CKO>; compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; rtc: ds1307@68 { compatible = "dallas,ds1307"; reg = <0x68>; }; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; status = "okay"; }; &sata { fsl,transmit-level-mV = <1104>; fsl,transmit-boost-mdB = <3330>; fsl,transmit-atten-16ths = <16>; fsl,receive-eq-mdB = <3000>; status = "okay"; }; &snvs_poweroff { status = "okay"; }; &spdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spdif>; status = "okay"; }; &ssi1 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &usbh1 { vbus-supply = <®_5p0v>; status = "okay"; }; &usbotg { vbus-supply = <®_5p0v>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; status = "okay"; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; bus-width = <4>; cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_3p3v>; voltage-ranges = <3300 3300>; no-1-8-v; status = "okay"; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; bus-width = <4>; cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_3p3v>; voltage-ranges = <3300 3300>; no-1-8-v; status = "okay"; }; &usdhc4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc4>; bus-width = <8>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_3p3v>; voltage-ranges = <3300 3300>; non-removable; no-1-8-v; status = "okay"; }; &iomuxc { pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 >; }; pinctrl_gpio_fan: gpiofangrp { fsl,pins = < MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1 >; }; pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1 >; }; pinctrl_hdmi: hdmigrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 >; }; pinctrl_ir: irgrp { fsl,pins = < MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059 >; }; pinctrl_sgtl5000: sgtl5000grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 >; }; pinctrl_spdif: spdifgrp { fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059 >; }; pinctrl_usdhc4: usdhc4grp { fsl,pins = < MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 >; }; }; |