USB EHCI controllers

Required properties:
  - compatible : should be "generic-ehci".
  - reg : should contain at least address and length of the standard EHCI
    register set for the device. Optional platform-dependent registers
    (debug-port or other) can be also specified here, but only after
    definition of standard EHCI registers.
  - interrupts : one EHCI interrupt should be described here.

Optional properties:
 - big-endian-regs : boolean, set this for hcds with big-endian registers
 - big-endian-desc : boolean, set this for hcds with big-endian descriptors
 - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
 - has-transaction-translator : boolean, set this if EHCI have a Transaction
				Translator built into the root hub.
 - clocks : a list of phandle + clock specifier pairs. In case of Renesas
	    R-Car Gen3 SoCs:
	    - if a host only channel: first clock should be host.
	    - if a USB DRD channel: first clock should be host and second one
				    should be peripheral.
 - phys : see usb-hcd.txt in the current directory
 - resets : phandle + reset specifier pair

additionally the properties from usb-hcd.txt (in the current directory) are
supported.

Example (Sequoia 440EPx):
    ehci@e0000300 {
	   compatible = "ibm,usb-ehci-440epx", "usb-ehci";
	   interrupt-parent = <&UIC0>;
	   interrupts = <1a 4>;
	   reg = <0 e0000300 90 0 e0000390 70>;
	   big-endian;
   };

Example (Allwinner sun4i A10 SoC):
   ehci0: usb@1c14000 {
	   compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
	   reg = <0x01c14000 0x100>;
	   interrupts = <39>;
	   clocks = <&ahb_gates 1>;
	   phys = <&usbphy 1>;
	   phy-names = "usb";
   };