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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 | /* * Copyright (c) 2012-2015, NVIDIA Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef HOST1X_DEV_H #define HOST1X_DEV_H #include <linux/device.h> #include <linux/iommu.h> #include <linux/iova.h> #include <linux/platform_device.h> #include <linux/reset.h> #include "cdma.h" #include "channel.h" #include "intr.h" #include "job.h" #include "syncpt.h" struct host1x_syncpt; struct host1x_syncpt_base; struct host1x_channel; struct host1x_cdma; struct host1x_job; struct push_buffer; struct output; struct dentry; struct host1x_channel_ops { int (*init)(struct host1x_channel *channel, struct host1x *host, unsigned int id); int (*submit)(struct host1x_job *job); }; struct host1x_cdma_ops { void (*start)(struct host1x_cdma *cdma); void (*stop)(struct host1x_cdma *cdma); void (*flush)(struct host1x_cdma *cdma); int (*timeout_init)(struct host1x_cdma *cdma, unsigned int syncpt); void (*timeout_destroy)(struct host1x_cdma *cdma); void (*freeze)(struct host1x_cdma *cdma); void (*resume)(struct host1x_cdma *cdma, u32 getptr); void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr, u32 syncpt_incrs, u32 syncval, u32 nr_slots); }; struct host1x_pushbuffer_ops { void (*init)(struct push_buffer *pb); }; struct host1x_debug_ops { void (*debug_init)(struct dentry *de); void (*show_channel_cdma)(struct host1x *host, struct host1x_channel *ch, struct output *o); void (*show_channel_fifo)(struct host1x *host, struct host1x_channel *ch, struct output *o); void (*show_mlocks)(struct host1x *host, struct output *output); }; struct host1x_syncpt_ops { void (*restore)(struct host1x_syncpt *syncpt); void (*restore_wait_base)(struct host1x_syncpt *syncpt); void (*load_wait_base)(struct host1x_syncpt *syncpt); u32 (*load)(struct host1x_syncpt *syncpt); int (*cpu_incr)(struct host1x_syncpt *syncpt); void (*assign_to_channel)(struct host1x_syncpt *syncpt, struct host1x_channel *channel); void (*enable_protection)(struct host1x *host); }; struct host1x_intr_ops { int (*init_host_sync)(struct host1x *host, u32 cpm, void (*syncpt_thresh_work)(struct work_struct *work)); void (*set_syncpt_threshold)( struct host1x *host, unsigned int id, u32 thresh); void (*enable_syncpt_intr)(struct host1x *host, unsigned int id); void (*disable_syncpt_intr)(struct host1x *host, unsigned int id); void (*disable_all_syncpt_intrs)(struct host1x *host); int (*free_syncpt_irq)(struct host1x *host); }; struct host1x_info { unsigned int nb_channels; /* host1x: number of channels supported */ unsigned int nb_pts; /* host1x: number of syncpoints supported */ unsigned int nb_bases; /* host1x: number of syncpoint bases supported */ unsigned int nb_mlocks; /* host1x: number of mlocks supported */ int (*init)(struct host1x *host1x); /* initialize per SoC ops */ unsigned int sync_offset; /* offset of syncpoint registers */ u64 dma_mask; /* mask of addressable memory */ bool has_hypervisor; /* has hypervisor registers */ }; struct host1x { const struct host1x_info *info; void __iomem *regs; void __iomem *hv_regs; /* hypervisor region */ struct host1x_syncpt *syncpt; struct host1x_syncpt_base *bases; struct device *dev; struct clk *clk; struct reset_control *rst; struct iommu_group *group; struct iommu_domain *domain; struct iova_domain iova; dma_addr_t iova_end; struct mutex intr_mutex; int intr_syncpt_irq; const struct host1x_syncpt_ops *syncpt_op; const struct host1x_intr_ops *intr_op; const struct host1x_channel_ops *channel_op; const struct host1x_cdma_ops *cdma_op; const struct host1x_pushbuffer_ops *cdma_pb_op; const struct host1x_debug_ops *debug_op; struct host1x_syncpt *nop_sp; struct mutex syncpt_mutex; struct host1x_channel_list channel_list; struct dentry *debugfs; struct mutex devices_lock; struct list_head devices; struct list_head list; }; void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v); u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r); void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); u32 host1x_sync_readl(struct host1x *host1x, u32 r); void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); u32 host1x_ch_readl(struct host1x_channel *ch, u32 r); static inline void host1x_hw_syncpt_restore(struct host1x *host, struct host1x_syncpt *sp) { host->syncpt_op->restore(sp); } static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, struct host1x_syncpt *sp) { host->syncpt_op->restore_wait_base(sp); } static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, struct host1x_syncpt *sp) { host->syncpt_op->load_wait_base(sp); } static inline u32 host1x_hw_syncpt_load(struct host1x *host, struct host1x_syncpt *sp) { return host->syncpt_op->load(sp); } static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, struct host1x_syncpt *sp) { return host->syncpt_op->cpu_incr(sp); } static inline void host1x_hw_syncpt_assign_to_channel( struct host1x *host, struct host1x_syncpt *sp, struct host1x_channel *ch) { return host->syncpt_op->assign_to_channel(sp, ch); } static inline void host1x_hw_syncpt_enable_protection(struct host1x *host) { return host->syncpt_op->enable_protection(host); } static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, void (*syncpt_thresh_work)(struct work_struct *)) { return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); } static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, unsigned int id, u32 thresh) { host->intr_op->set_syncpt_threshold(host, id, thresh); } static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, unsigned int id) { host->intr_op->enable_syncpt_intr(host, id); } static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, unsigned int id) { host->intr_op->disable_syncpt_intr(host, id); } static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) { host->intr_op->disable_all_syncpt_intrs(host); } static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) { return host->intr_op->free_syncpt_irq(host); } static inline int host1x_hw_channel_init(struct host1x *host, struct host1x_channel *channel, unsigned int id) { return host->channel_op->init(channel, host, id); } static inline int host1x_hw_channel_submit(struct host1x *host, struct host1x_job *job) { return host->channel_op->submit(job); } static inline void host1x_hw_cdma_start(struct host1x *host, struct host1x_cdma *cdma) { host->cdma_op->start(cdma); } static inline void host1x_hw_cdma_stop(struct host1x *host, struct host1x_cdma *cdma) { host->cdma_op->stop(cdma); } static inline void host1x_hw_cdma_flush(struct host1x *host, struct host1x_cdma *cdma) { host->cdma_op->flush(cdma); } static inline int host1x_hw_cdma_timeout_init(struct host1x *host, struct host1x_cdma *cdma, unsigned int syncpt) { return host->cdma_op->timeout_init(cdma, syncpt); } static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host, struct host1x_cdma *cdma) { host->cdma_op->timeout_destroy(cdma); } static inline void host1x_hw_cdma_freeze(struct host1x *host, struct host1x_cdma *cdma) { host->cdma_op->freeze(cdma); } static inline void host1x_hw_cdma_resume(struct host1x *host, struct host1x_cdma *cdma, u32 getptr) { host->cdma_op->resume(cdma, getptr); } static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host, struct host1x_cdma *cdma, u32 getptr, u32 syncpt_incrs, u32 syncval, u32 nr_slots) { host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval, nr_slots); } static inline void host1x_hw_pushbuffer_init(struct host1x *host, struct push_buffer *pb) { host->cdma_pb_op->init(pb); } static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de) { if (host->debug_op && host->debug_op->debug_init) host->debug_op->debug_init(de); } static inline void host1x_hw_show_channel_cdma(struct host1x *host, struct host1x_channel *channel, struct output *o) { host->debug_op->show_channel_cdma(host, channel, o); } static inline void host1x_hw_show_channel_fifo(struct host1x *host, struct host1x_channel *channel, struct output *o) { host->debug_op->show_channel_fifo(host, channel, o); } static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o) { host->debug_op->show_mlocks(host, o); } extern struct platform_driver tegra_mipi_driver; #endif |