Linux Audio

Check our new training course

Embedded Linux Audio

Check our new training course
with Creative Commons CC-BY-SA
lecture materials

Bootlin logo

Elixir Cross Referencer

Open Menu / arch / cris / include / arch-v32 / arch / hwregs / asm / ata_defs_asm.h
Loading...
  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
#ifndef __ata_defs_asm_h
#define __ata_defs_asm_h

/*
 * This file is autogenerated from
 *   file:           ../../inst/ata/rtl/ata_regs.r
 *     id:           ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
 *     last modfied: Mon Apr 11 16:06:25 2005
 *
 *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/ata_defs_asm.h ../../inst/ata/rtl/ata_regs.r
 *      id: $Id: ata_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
 * Any changes here will be lost.
 *
 * -*- buffer-read-only: t -*-
 */

#ifndef REG_FIELD
#define REG_FIELD( scope, reg, field, value ) \
  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
#define REG_FIELD_X_( value, shift ) ((value) << shift)
#endif

#ifndef REG_STATE
#define REG_STATE( scope, reg, field, symbolic_value ) \
  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
#define REG_STATE_X_( k, shift ) (k << shift)
#endif

#ifndef REG_MASK
#define REG_MASK( scope, reg, field ) \
  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
#endif

#ifndef REG_LSB
#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
#endif

#ifndef REG_BIT
#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
#endif

#ifndef REG_ADDR
#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
#endif

#ifndef REG_ADDR_VECT
#define REG_ADDR_VECT( scope, inst, reg, index ) \
         REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
			 STRIDE_##scope##_##reg )
#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
                          ((inst) + offs + (index) * stride)
#endif

/* Register rw_ctrl0, scope ata, type rw */
#define reg_ata_rw_ctrl0___pio_hold___lsb 0
#define reg_ata_rw_ctrl0___pio_hold___width 6
#define reg_ata_rw_ctrl0___pio_strb___lsb 6
#define reg_ata_rw_ctrl0___pio_strb___width 6
#define reg_ata_rw_ctrl0___pio_setup___lsb 12
#define reg_ata_rw_ctrl0___pio_setup___width 6
#define reg_ata_rw_ctrl0___dma_hold___lsb 18
#define reg_ata_rw_ctrl0___dma_hold___width 6
#define reg_ata_rw_ctrl0___dma_strb___lsb 24
#define reg_ata_rw_ctrl0___dma_strb___width 6
#define reg_ata_rw_ctrl0___rst___lsb 30
#define reg_ata_rw_ctrl0___rst___width 1
#define reg_ata_rw_ctrl0___rst___bit 30
#define reg_ata_rw_ctrl0___en___lsb 31
#define reg_ata_rw_ctrl0___en___width 1
#define reg_ata_rw_ctrl0___en___bit 31
#define reg_ata_rw_ctrl0_offset 12

/* Register rw_ctrl1, scope ata, type rw */
#define reg_ata_rw_ctrl1___udma_tcyc___lsb 0
#define reg_ata_rw_ctrl1___udma_tcyc___width 4
#define reg_ata_rw_ctrl1___udma_tdvs___lsb 4
#define reg_ata_rw_ctrl1___udma_tdvs___width 4
#define reg_ata_rw_ctrl1_offset 16

/* Register rw_ctrl2, scope ata, type rw */
#define reg_ata_rw_ctrl2___data___lsb 0
#define reg_ata_rw_ctrl2___data___width 16
#define reg_ata_rw_ctrl2___dma_size___lsb 19
#define reg_ata_rw_ctrl2___dma_size___width 1
#define reg_ata_rw_ctrl2___dma_size___bit 19
#define reg_ata_rw_ctrl2___multi___lsb 20
#define reg_ata_rw_ctrl2___multi___width 1
#define reg_ata_rw_ctrl2___multi___bit 20
#define reg_ata_rw_ctrl2___hsh___lsb 21
#define reg_ata_rw_ctrl2___hsh___width 2
#define reg_ata_rw_ctrl2___trf_mode___lsb 23
#define reg_ata_rw_ctrl2___trf_mode___width 1
#define reg_ata_rw_ctrl2___trf_mode___bit 23
#define reg_ata_rw_ctrl2___rw___lsb 24
#define reg_ata_rw_ctrl2___rw___width 1
#define reg_ata_rw_ctrl2___rw___bit 24
#define reg_ata_rw_ctrl2___addr___lsb 25
#define reg_ata_rw_ctrl2___addr___width 3
#define reg_ata_rw_ctrl2___cs0___lsb 28
#define reg_ata_rw_ctrl2___cs0___width 1
#define reg_ata_rw_ctrl2___cs0___bit 28
#define reg_ata_rw_ctrl2___cs1___lsb 29
#define reg_ata_rw_ctrl2___cs1___width 1
#define reg_ata_rw_ctrl2___cs1___bit 29
#define reg_ata_rw_ctrl2___sel___lsb 30
#define reg_ata_rw_ctrl2___sel___width 2
#define reg_ata_rw_ctrl2_offset 0

/* Register rs_stat_data, scope ata, type rs */
#define reg_ata_rs_stat_data___data___lsb 0
#define reg_ata_rs_stat_data___data___width 16
#define reg_ata_rs_stat_data___dav___lsb 16
#define reg_ata_rs_stat_data___dav___width 1
#define reg_ata_rs_stat_data___dav___bit 16
#define reg_ata_rs_stat_data___busy___lsb 17
#define reg_ata_rs_stat_data___busy___width 1
#define reg_ata_rs_stat_data___busy___bit 17
#define reg_ata_rs_stat_data_offset 4

/* Register r_stat_data, scope ata, type r */
#define reg_ata_r_stat_data___data___lsb 0
#define reg_ata_r_stat_data___data___width 16
#define reg_ata_r_stat_data___dav___lsb 16
#define reg_ata_r_stat_data___dav___width 1
#define reg_ata_r_stat_data___dav___bit 16
#define reg_ata_r_stat_data___busy___lsb 17
#define reg_ata_r_stat_data___busy___width 1
#define reg_ata_r_stat_data___busy___bit 17
#define reg_ata_r_stat_data_offset 8

/* Register rw_trf_cnt, scope ata, type rw */
#define reg_ata_rw_trf_cnt___cnt___lsb 0
#define reg_ata_rw_trf_cnt___cnt___width 17
#define reg_ata_rw_trf_cnt_offset 20

/* Register r_stat_misc, scope ata, type r */
#define reg_ata_r_stat_misc___crc___lsb 0
#define reg_ata_r_stat_misc___crc___width 16
#define reg_ata_r_stat_misc_offset 24

/* Register rw_intr_mask, scope ata, type rw */
#define reg_ata_rw_intr_mask___bus0___lsb 0
#define reg_ata_rw_intr_mask___bus0___width 1
#define reg_ata_rw_intr_mask___bus0___bit 0
#define reg_ata_rw_intr_mask___bus1___lsb 1
#define reg_ata_rw_intr_mask___bus1___width 1
#define reg_ata_rw_intr_mask___bus1___bit 1
#define reg_ata_rw_intr_mask___bus2___lsb 2
#define reg_ata_rw_intr_mask___bus2___width 1
#define reg_ata_rw_intr_mask___bus2___bit 2
#define reg_ata_rw_intr_mask___bus3___lsb 3
#define reg_ata_rw_intr_mask___bus3___width 1
#define reg_ata_rw_intr_mask___bus3___bit 3
#define reg_ata_rw_intr_mask_offset 28

/* Register rw_ack_intr, scope ata, type rw */
#define reg_ata_rw_ack_intr___bus0___lsb 0
#define reg_ata_rw_ack_intr___bus0___width 1
#define reg_ata_rw_ack_intr___bus0___bit 0
#define reg_ata_rw_ack_intr___bus1___lsb 1
#define reg_ata_rw_ack_intr___bus1___width 1
#define reg_ata_rw_ack_intr___bus1___bit 1
#define reg_ata_rw_ack_intr___bus2___lsb 2
#define reg_ata_rw_ack_intr___bus2___width 1
#define reg_ata_rw_ack_intr___bus2___bit 2
#define reg_ata_rw_ack_intr___bus3___lsb 3
#define reg_ata_rw_ack_intr___bus3___width 1
#define reg_ata_rw_ack_intr___bus3___bit 3
#define reg_ata_rw_ack_intr_offset 32

/* Register r_intr, scope ata, type r */
#define reg_ata_r_intr___bus0___lsb 0
#define reg_ata_r_intr___bus0___width 1
#define reg_ata_r_intr___bus0___bit 0
#define reg_ata_r_intr___bus1___lsb 1
#define reg_ata_r_intr___bus1___width 1
#define reg_ata_r_intr___bus1___bit 1
#define reg_ata_r_intr___bus2___lsb 2
#define reg_ata_r_intr___bus2___width 1
#define reg_ata_r_intr___bus2___bit 2
#define reg_ata_r_intr___bus3___lsb 3
#define reg_ata_r_intr___bus3___width 1
#define reg_ata_r_intr___bus3___bit 3
#define reg_ata_r_intr_offset 36

/* Register r_masked_intr, scope ata, type r */
#define reg_ata_r_masked_intr___bus0___lsb 0
#define reg_ata_r_masked_intr___bus0___width 1
#define reg_ata_r_masked_intr___bus0___bit 0
#define reg_ata_r_masked_intr___bus1___lsb 1
#define reg_ata_r_masked_intr___bus1___width 1
#define reg_ata_r_masked_intr___bus1___bit 1
#define reg_ata_r_masked_intr___bus2___lsb 2
#define reg_ata_r_masked_intr___bus2___width 1
#define reg_ata_r_masked_intr___bus2___bit 2
#define reg_ata_r_masked_intr___bus3___lsb 3
#define reg_ata_r_masked_intr___bus3___width 1
#define reg_ata_r_masked_intr___bus3___bit 3
#define reg_ata_r_masked_intr_offset 40


/* Constants */
#define regk_ata_active                           0x00000001
#define regk_ata_byte                             0x00000001
#define regk_ata_data                             0x00000001
#define regk_ata_dma                              0x00000001
#define regk_ata_inactive                         0x00000000
#define regk_ata_no                               0x00000000
#define regk_ata_nodata                           0x00000000
#define regk_ata_pio                              0x00000000
#define regk_ata_rd                               0x00000001
#define regk_ata_reg                              0x00000000
#define regk_ata_rw_ctrl0_default                 0x00000000
#define regk_ata_rw_ctrl2_default                 0x00000000
#define regk_ata_rw_intr_mask_default             0x00000000
#define regk_ata_udma                             0x00000002
#define regk_ata_word                             0x00000000
#define regk_ata_wr                               0x00000000
#define regk_ata_yes                              0x00000001
#endif /* __ata_defs_asm_h */