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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 | /* * GPIO driver for the WinSystems WS16C48 * Copyright (C) 2016 William Breathitt Gray * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. */ #include <linux/bitops.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/gpio/driver.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/irqdesc.h> #include <linux/isa.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/spinlock.h> #define WS16C48_EXTENT 16 #define MAX_NUM_WS16C48 max_num_isa_dev(WS16C48_EXTENT) static unsigned int base[MAX_NUM_WS16C48]; static unsigned int num_ws16c48; module_param_array(base, uint, &num_ws16c48, 0); MODULE_PARM_DESC(base, "WinSystems WS16C48 base addresses"); static unsigned int irq[MAX_NUM_WS16C48]; module_param_array(irq, uint, NULL, 0); MODULE_PARM_DESC(irq, "WinSystems WS16C48 interrupt line numbers"); /** * struct ws16c48_gpio - GPIO device private data structure * @chip: instance of the gpio_chip * @io_state: bit I/O state (whether bit is set to input or output) * @out_state: output bits state * @lock: synchronization lock to prevent I/O race conditions * @irq_mask: I/O bits affected by interrupts * @flow_mask: IRQ flow type mask for the respective I/O bits * @base: base port address of the GPIO device * @irq: Interrupt line number */ struct ws16c48_gpio { struct gpio_chip chip; unsigned char io_state[6]; unsigned char out_state[6]; spinlock_t lock; unsigned long irq_mask; unsigned long flow_mask; unsigned base; unsigned irq; }; static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); return !!(ws16c48gpio->io_state[port] & mask); } static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); unsigned long flags; spin_lock_irqsave(&ws16c48gpio->lock, flags); ws16c48gpio->io_state[port] |= mask; ws16c48gpio->out_state[port] &= ~mask; outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return 0; } static int ws16c48_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); unsigned long flags; spin_lock_irqsave(&ws16c48gpio->lock, flags); ws16c48gpio->io_state[port] &= ~mask; if (value) ws16c48gpio->out_state[port] |= mask; else ws16c48gpio->out_state[port] &= ~mask; outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return 0; } static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); unsigned long flags; unsigned port_state; spin_lock_irqsave(&ws16c48gpio->lock, flags); /* ensure that GPIO is set for input */ if (!(ws16c48gpio->io_state[port] & mask)) { spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return -EINVAL; } port_state = inb(ws16c48gpio->base + port); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return !!(port_state & mask); } static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); unsigned long flags; spin_lock_irqsave(&ws16c48gpio->lock, flags); /* ensure that GPIO is set for output */ if (ws16c48gpio->io_state[port] & mask) { spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return; } if (value) ws16c48gpio->out_state[port] |= mask; else ws16c48gpio->out_state[port] &= ~mask; outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); } static void ws16c48_irq_ack(struct irq_data *data) { struct gpio_chip *chip = irq_data_get_irq_chip_data(data); struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned long offset = irqd_to_hwirq(data); const unsigned port = offset / 8; const unsigned mask = BIT(offset % 8); unsigned long flags; unsigned port_state; /* only the first 3 ports support interrupts */ if (port > 2) return; spin_lock_irqsave(&ws16c48gpio->lock, flags); port_state = ws16c48gpio->irq_mask >> (8*port); outb(0x80, ws16c48gpio->base + 7); outb(port_state & ~mask, ws16c48gpio->base + 8 + port); outb(port_state | mask, ws16c48gpio->base + 8 + port); outb(0xC0, ws16c48gpio->base + 7); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); } static void ws16c48_irq_mask(struct irq_data *data) { struct gpio_chip *chip = irq_data_get_irq_chip_data(data); struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned long offset = irqd_to_hwirq(data); const unsigned long mask = BIT(offset); const unsigned port = offset / 8; unsigned long flags; /* only the first 3 ports support interrupts */ if (port > 2) return; spin_lock_irqsave(&ws16c48gpio->lock, flags); ws16c48gpio->irq_mask &= ~mask; outb(0x80, ws16c48gpio->base + 7); outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port); outb(0xC0, ws16c48gpio->base + 7); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); } static void ws16c48_irq_unmask(struct irq_data *data) { struct gpio_chip *chip = irq_data_get_irq_chip_data(data); struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned long offset = irqd_to_hwirq(data); const unsigned long mask = BIT(offset); const unsigned port = offset / 8; unsigned long flags; /* only the first 3 ports support interrupts */ if (port > 2) return; spin_lock_irqsave(&ws16c48gpio->lock, flags); ws16c48gpio->irq_mask |= mask; outb(0x80, ws16c48gpio->base + 7); outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port); outb(0xC0, ws16c48gpio->base + 7); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); } static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type) { struct gpio_chip *chip = irq_data_get_irq_chip_data(data); struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); const unsigned long offset = irqd_to_hwirq(data); const unsigned long mask = BIT(offset); const unsigned port = offset / 8; unsigned long flags; /* only the first 3 ports support interrupts */ if (port > 2) return -EINVAL; spin_lock_irqsave(&ws16c48gpio->lock, flags); switch (flow_type) { case IRQ_TYPE_NONE: break; case IRQ_TYPE_EDGE_RISING: ws16c48gpio->flow_mask |= mask; break; case IRQ_TYPE_EDGE_FALLING: ws16c48gpio->flow_mask &= ~mask; break; default: spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return -EINVAL; } outb(0x40, ws16c48gpio->base + 7); outb(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port); outb(0xC0, ws16c48gpio->base + 7); spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return 0; } static struct irq_chip ws16c48_irqchip = { .name = "ws16c48", .irq_ack = ws16c48_irq_ack, .irq_mask = ws16c48_irq_mask, .irq_unmask = ws16c48_irq_unmask, .irq_set_type = ws16c48_irq_set_type }; static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id) { struct ws16c48_gpio *const ws16c48gpio = dev_id; struct gpio_chip *const chip = &ws16c48gpio->chip; unsigned long int_pending; unsigned long port; unsigned long int_id; unsigned long gpio; int_pending = inb(ws16c48gpio->base + 6) & 0x7; if (!int_pending) return IRQ_NONE; /* loop until all pending interrupts are handled */ do { for_each_set_bit(port, &int_pending, 3) { int_id = inb(ws16c48gpio->base + 8 + port); for_each_set_bit(gpio, &int_id, 8) generic_handle_irq(irq_find_mapping( chip->irqdomain, gpio + 8*port)); } int_pending = inb(ws16c48gpio->base + 6) & 0x7; } while (int_pending); return IRQ_HANDLED; } static int ws16c48_probe(struct device *dev, unsigned int id) { struct ws16c48_gpio *ws16c48gpio; const char *const name = dev_name(dev); int err; ws16c48gpio = devm_kzalloc(dev, sizeof(*ws16c48gpio), GFP_KERNEL); if (!ws16c48gpio) return -ENOMEM; if (!devm_request_region(dev, base[id], WS16C48_EXTENT, name)) { dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", base[id], base[id] + WS16C48_EXTENT); return -EBUSY; } ws16c48gpio->chip.label = name; ws16c48gpio->chip.parent = dev; ws16c48gpio->chip.owner = THIS_MODULE; ws16c48gpio->chip.base = -1; ws16c48gpio->chip.ngpio = 48; ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction; ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input; ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output; ws16c48gpio->chip.get = ws16c48_gpio_get; ws16c48gpio->chip.set = ws16c48_gpio_set; ws16c48gpio->base = base[id]; ws16c48gpio->irq = irq[id]; spin_lock_init(&ws16c48gpio->lock); dev_set_drvdata(dev, ws16c48gpio); err = gpiochip_add_data(&ws16c48gpio->chip, ws16c48gpio); if (err) { dev_err(dev, "GPIO registering failed (%d)\n", err); return err; } /* Disable IRQ by default */ outb(0x80, base[id] + 7); outb(0, base[id] + 8); outb(0, base[id] + 9); outb(0, base[id] + 10); outb(0xC0, base[id] + 7); err = gpiochip_irqchip_add(&ws16c48gpio->chip, &ws16c48_irqchip, 0, handle_edge_irq, IRQ_TYPE_NONE); if (err) { dev_err(dev, "Could not add irqchip (%d)\n", err); goto err_gpiochip_remove; } err = request_irq(irq[id], ws16c48_irq_handler, IRQF_SHARED, name, ws16c48gpio); if (err) { dev_err(dev, "IRQ handler registering failed (%d)\n", err); goto err_gpiochip_remove; } return 0; err_gpiochip_remove: gpiochip_remove(&ws16c48gpio->chip); return err; } static int ws16c48_remove(struct device *dev, unsigned int id) { struct ws16c48_gpio *const ws16c48gpio = dev_get_drvdata(dev); free_irq(ws16c48gpio->irq, ws16c48gpio); gpiochip_remove(&ws16c48gpio->chip); return 0; } static struct isa_driver ws16c48_driver = { .probe = ws16c48_probe, .driver = { .name = "ws16c48" }, .remove = ws16c48_remove }; module_isa_driver(ws16c48_driver, num_ws16c48); MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>"); MODULE_DESCRIPTION("WinSystems WS16C48 GPIO driver"); MODULE_LICENSE("GPL v2"); |