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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 | Build Framework =============== The perf build framework was adopted from the kernel build system, hence the idea and the way how objects are built is the same. Basically the user provides set of 'Build' files that list objects and directories to nest for specific target to be build. Unlike the kernel we don't have a single build object 'obj-y' list that where we setup source objects, but we support more. This allows one 'Build' file to carry a sources list for multiple build objects. Build framework makefiles ------------------------- The build framework consists of 2 Makefiles: Build.include Makefile.build While the 'Build.include' file contains just some generic definitions, the 'Makefile.build' file is the makefile used from the outside. It's interface/usage is following: $ make -f tools/build/Makefile.build srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT) where: KSRC - is the path to kernel sources DIR - is the path to the project to be built OBJECT - is the name of the build object When succefully finished the $(DIR) directory contains the final object file called $(OBJECT)-in.o: $ ls $(DIR)/$(OBJECT)-in.o which includes all compiled sources described in 'Build' makefiles. Build makefiles --------------- The user supplies 'Build' makefiles that contains a objects list, and connects the build to nested directories. Assume we have the following project structure: ex/a.c /b.c /c.c /d.c /arch/e.c /arch/f.c Out of which you build the 'ex' binary ' and the 'libex.a' library: 'ex' - consists of 'a.o', 'b.o' and libex.a 'libex.a' - consists of 'c.o', 'd.o', 'e.o' and 'f.o' The build framework does not create the 'ex' and 'libex.a' binaries for you, it only prepares proper objects to be compiled and grouped together. To follow the above example, the user provides following 'Build' files: ex/Build: ex-y += a.o ex-y += b.o ex-y += b.o # duplicates in the lists are allowed libex-y += c.o libex-y += d.o libex-y += arch/ ex/arch/Build: libex-y += e.o libex-y += f.o and runs: $ make -f tools/build/Makefile.build dir=. obj=ex $ make -f tools/build/Makefile.build dir=. obj=libex which creates the following objects: ex/ex-in.o ex/libex-in.o that contain request objects names in Build files. It's only a matter of 2 single commands to create the final binaries: $ ar rcs libex.a libex-in.o $ gcc -o ex ex-in.o libex.a You can check the 'ex' example in 'tools/build/tests/ex' for more details. Makefile.include ---------------- The tools/build/Makefile.include makefile could be included via user makefiles to get usefull definitions. It defines following interface: - build macro definition: build := -f $(srctree)/tools/build/Makefile.build dir=. obj to make it easier to invoke build like: make $(build)=ex Fixdep ------ It is necessary to build the fixdep helper before invoking the build. The Makefile.include file adds the fixdep target, that could be invoked by the user. Rules ----- The build framework provides standard compilation rules to handle .S and .c compilation. It's possible to include special rule if needed (like we do for flex or bison code generation). CFLAGS ------ It's possible to alter the standard object C flags in the following way: CFLAGS_perf.o += '...' - alters CFLAGS for perf.o object CFLAGS_gtk += '...' - alters CFLAGS for gtk build object This C flags changes has the scope of the Build makefile they are defined in. Dependencies ------------ For each built object file 'a.o' the '.a.cmd' is created and holds: - Command line used to built that object (for each object) - Dependency rules generated by 'gcc -Wp,-MD,...' (for compiled object) All existing '.cmd' files are included in the Build process to follow properly the dependencies and trigger a rebuild when necessary. Single rules ------------ It's possible to build single object file by choice, like: $ make util/map.o # objects $ make util/map.i # preprocessor $ make util/map.s # assembly |