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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 | /* * DTS file for all SPEAr13xx SoCs * * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /include/ "skeleton.dtsi" / { interrupt-parent = <&gic>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; reg = <1>; next-level-cache = <&L2>; }; }; gic: interrupt-controller@ec801000 { compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; reg = < 0xec801000 0x1000 >, < 0xec800100 0x0100 >; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 6 0x04 0 7 0x04>; }; L2: l2-cache { compatible = "arm,pl310-cache"; reg = <0xed000000 0x1000>; cache-unified; cache-level = <2>; }; memory { name = "memory"; device_type = "memory"; reg = <0 0x40000000>; }; chosen { bootargs = "console=ttyAMA0,115200"; }; ahb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x50000000 0x50000000 0x10000000 0xb0000000 0xb0000000 0x10000000 0xe0000000 0xe0000000 0x10000000>; sdhci@b3000000 { compatible = "st,sdhci-spear"; reg = <0xb3000000 0x100>; interrupts = <0 28 0x4>; status = "disabled"; }; cf@b2800000 { compatible = "arasan,cf-spear1340"; reg = <0xb2800000 0x100>; interrupts = <0 29 0x4>; status = "disabled"; }; dma@ea800000 { compatible = "snps,dma-spear1340"; reg = <0xea800000 0x1000>; interrupts = <0 19 0x4>; status = "disabled"; }; dma@eb000000 { compatible = "snps,dma-spear1340"; reg = <0xeb000000 0x1000>; interrupts = <0 59 0x4>; status = "disabled"; }; fsmc: flash@b0000000 { compatible = "st,spear600-fsmc-nand"; #address-cells = <1>; #size-cells = <1>; reg = <0xb0000000 0x1000 /* FSMC Register */ 0xb0800000 0x0010>; /* NAND Base */ reg-names = "fsmc_regs", "nand_data"; interrupts = <0 20 0x4 0 21 0x4 0 22 0x4 0 23 0x4>; st,ale-off = <0x20000>; st,cle-off = <0x10000>; status = "disabled"; }; gmac0: eth@e2000000 { compatible = "st,spear600-gmac"; reg = <0xe2000000 0x8000>; interrupts = <0 33 0x4 0 34 0x4>; interrupt-names = "macirq", "eth_wake_irq"; status = "disabled"; }; smi: flash@ea000000 { compatible = "st,spear600-smi"; #address-cells = <1>; #size-cells = <1>; reg = <0xea000000 0x1000>; interrupts = <0 30 0x4>; status = "disabled"; }; spi0: spi@e0100000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xe0100000 0x1000>; interrupts = <0 31 0x4>; status = "disabled"; }; ehci@e4800000 { compatible = "st,spear600-ehci", "usb-ehci"; reg = <0xe4800000 0x1000>; interrupts = <0 64 0x4>; status = "disabled"; }; ehci@e5800000 { compatible = "st,spear600-ehci", "usb-ehci"; reg = <0xe5800000 0x1000>; interrupts = <0 66 0x4>; status = "disabled"; }; ohci@e4000000 { compatible = "st,spear600-ohci", "usb-ohci"; reg = <0xe4000000 0x1000>; interrupts = <0 65 0x4>; status = "disabled"; }; ohci@e5000000 { compatible = "st,spear600-ohci", "usb-ohci"; reg = <0xe5000000 0x1000>; interrupts = <0 67 0x4>; status = "disabled"; }; apb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x50000000 0x50000000 0x10000000 0xb0000000 0xb0000000 0x10000000 0xe0000000 0xe0000000 0x10000000>; gpio0: gpio@e0600000 { compatible = "arm,pl061", "arm,primecell"; reg = <0xe0600000 0x1000>; interrupts = <0 24 0x4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; status = "disabled"; }; gpio1: gpio@e0680000 { compatible = "arm,pl061", "arm,primecell"; reg = <0xe0680000 0x1000>; interrupts = <0 25 0x4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; status = "disabled"; }; kbd@e0300000 { compatible = "st,spear300-kbd"; reg = <0xe0300000 0x1000>; interrupts = <0 52 0x4>; status = "disabled"; }; i2c0: i2c@e0280000 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xe0280000 0x1000>; interrupts = <0 41 0x4>; status = "disabled"; }; rtc@e0580000 { compatible = "st,spear-rtc"; reg = <0xe0580000 0x1000>; interrupts = <0 36 0x4>; status = "disabled"; }; serial@e0000000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xe0000000 0x1000>; interrupts = <0 35 0x4>; status = "disabled"; }; adc@e0080000 { compatible = "st,spear600-adc"; reg = <0xe0080000 0x1000>; interrupts = <0 44 0x4>; status = "disabled"; }; timer@e0380000 { compatible = "st,spear-timer"; reg = <0xe0380000 0x400>; interrupts = <0 37 0x4>; }; timer@ec800600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xec800600 0x20>; interrupts = <1 13 0x301>; }; wdt@ec800620 { compatible = "arm,cortex-a9-twd-wdt"; reg = <0xec800620 0x20>; status = "disabled"; }; thermal@e07008c4 { compatible = "st,thermal-spear1340"; reg = <0xe07008c4 0x4>; }; }; }; }; |