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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 | /* * Copyright 2011 Calxeda, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see <http://www.gnu.org/licenses/>. */ /dts-v1/; /* First 4KB has pen for secondary cores. */ /memreserve/ 0x00000000 0x0001000; / { model = "Calxeda Highbank"; compatible = "calxeda,highbank"; #address-cells = <1>; #size-cells = <1>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; reg = <1>; next-level-cache = <&L2>; }; cpu@2 { compatible = "arm,cortex-a9"; reg = <2>; next-level-cache = <&L2>; }; cpu@3 { compatible = "arm,cortex-a9"; reg = <3>; next-level-cache = <&L2>; }; }; memory { name = "memory"; device_type = "memory"; reg = <0x00000000 0xff900000>; }; chosen { bootargs = "console=ttyAMA0"; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&intc>; ranges; timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xfff10600 0x20>; interrupts = <1 13 0xf01>; }; watchdog@fff10620 { compatible = "arm,cortex-a9-twd-wdt"; reg = <0xfff10620 0x20>; interrupts = <1 14 0xf01>; }; intc: interrupt-controller@fff11000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #size-cells = <0>; #address-cells = <1>; interrupt-controller; reg = <0xfff11000 0x1000>, <0xfff10100 0x100>; }; L2: l2-cache { compatible = "arm,pl310-cache"; reg = <0xfff12000 0x1000>; interrupts = <0 70 4>; cache-unified; cache-level = <2>; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; }; sata@ffe08000 { compatible = "calxeda,hb-ahci"; reg = <0xffe08000 0x10000>; interrupts = <0 83 4>; }; sdhci@ffe0e000 { compatible = "calxeda,hb-sdhci"; reg = <0xffe0e000 0x1000>; interrupts = <0 90 4>; }; ipc@fff20000 { compatible = "arm,pl320", "arm,primecell"; reg = <0xfff20000 0x1000>; interrupts = <0 7 4>; }; gpioe: gpio@fff30000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xfff30000 0x1000>; interrupts = <0 14 4>; }; gpiof: gpio@fff31000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xfff31000 0x1000>; interrupts = <0 15 4>; }; gpiog: gpio@fff32000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xfff32000 0x1000>; interrupts = <0 16 4>; }; gpioh: gpio@fff33000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xfff33000 0x1000>; interrupts = <0 17 4>; }; timer { compatible = "arm,sp804", "arm,primecell"; reg = <0xfff34000 0x1000>; interrupts = <0 18 4>; }; rtc@fff35000 { compatible = "arm,pl031", "arm,primecell"; reg = <0xfff35000 0x1000>; interrupts = <0 19 4>; }; serial@fff36000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xfff36000 0x1000>; interrupts = <0 20 4>; }; smic@fff3a000 { compatible = "ipmi-smic"; device_type = "ipmi"; reg = <0xfff3a000 0x1000>; interrupts = <0 24 4>; reg-size = <4>; reg-spacing = <4>; }; sregs@fff3c000 { compatible = "calxeda,hb-sregs"; reg = <0xfff3c000 0x1000>; }; dma@fff3d000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xfff3d000 0x1000>; interrupts = <0 92 4>; }; ethernet@fff50000 { compatible = "calxeda,hb-xgmac"; reg = <0xfff50000 0x1000>; interrupts = <0 77 4 0 78 4 0 79 4>; }; ethernet@fff51000 { compatible = "calxeda,hb-xgmac"; reg = <0xfff51000 0x1000>; interrupts = <0 80 4 0 81 4 0 82 4>; }; }; }; |