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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 | # IOMMU_API always gets selected by whoever wants it. config IOMMU_API bool menuconfig IOMMU_SUPPORT bool "IOMMU Hardware Support" default y ---help--- Say Y here if you want to compile device drivers for IO Memory Management Units into the kernel. These devices usually allow to remap DMA requests and/or remap interrupts from other devices on the system. if IOMMU_SUPPORT config OF_IOMMU def_bool y depends on OF config FSL_PAMU bool "Freescale IOMMU support" depends on PPC_E500MC select IOMMU_API select GENERIC_ALLOCATOR help Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. PAMU can authorize memory access, remap the memory address, and remap I/O transaction types. # MSM IOMMU support config MSM_IOMMU bool "MSM IOMMU Support" depends on ARCH_MSM8X60 || ARCH_MSM8960 select IOMMU_API help Support for the IOMMUs found on certain Qualcomm SOCs. These IOMMUs allow virtualization of the address space used by most cores within the multimedia subsystem. If unsure, say N here. config IOMMU_PGTABLES_L2 def_bool y depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n # AMD IOMMU support config AMD_IOMMU bool "AMD IOMMU support" select SWIOTLB select PCI_MSI select PCI_ATS select PCI_PRI select PCI_PASID select IOMMU_API depends on X86_64 && PCI && ACPI ---help--- With this option you can enable support for AMD IOMMU hardware in your system. An IOMMU is a hardware component which provides remapping of DMA memory accesses from devices. With an AMD IOMMU you can isolate the DMA memory of different devices and protect the system from misbehaving device drivers or hardware. You can find out if your system has an AMD IOMMU if you look into your BIOS for an option to enable it or if you have an IVRS ACPI table. config AMD_IOMMU_STATS bool "Export AMD IOMMU statistics to debugfs" depends on AMD_IOMMU select DEBUG_FS ---help--- This option enables code in the AMD IOMMU driver to collect various statistics about whats happening in the driver and exports that information to userspace via debugfs. If unsure, say N. config AMD_IOMMU_V2 tristate "AMD IOMMU Version 2 driver" depends on AMD_IOMMU select MMU_NOTIFIER ---help--- This option enables support for the AMD IOMMUv2 features of the IOMMU hardware. Select this option if you want to use devices that support the PCI PRI and PASID interface. # Intel IOMMU support config DMAR_TABLE bool config INTEL_IOMMU bool "Support for Intel IOMMU using DMA Remapping Devices" depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) select IOMMU_API select DMAR_TABLE help DMA remapping (DMAR) devices support enables independent address translations for Direct Memory Access (DMA) from devices. These DMA remapping devices are reported via ACPI tables and include PCI device scope covered by these DMA remapping devices. config INTEL_IOMMU_DEFAULT_ON def_bool y prompt "Enable Intel DMA Remapping Devices by default" depends on INTEL_IOMMU help Selecting this option will enable a DMAR device at boot time if one is found. If this option is not selected, DMAR support can be enabled by passing intel_iommu=on to the kernel. config INTEL_IOMMU_BROKEN_GFX_WA bool "Workaround broken graphics drivers (going away soon)" depends on INTEL_IOMMU && BROKEN && X86 ---help--- Current Graphics drivers tend to use physical address for DMA and avoid using DMA APIs. Setting this config option permits the IOMMU driver to set a unity map for all the OS-visible memory. Hence the driver can continue to use physical addresses for DMA, at least until this option is removed in the 2.6.32 kernel. config INTEL_IOMMU_FLOPPY_WA def_bool y depends on INTEL_IOMMU && X86 ---help--- Floppy disk drivers are known to bypass DMA API calls thereby failing to work when IOMMU is enabled. This workaround will setup a 1:1 mapping for the first 16MiB to make floppy (an ISA device) work. config IRQ_REMAP bool "Support for Interrupt Remapping" depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI select DMAR_TABLE ---help--- Supports Interrupt remapping for IO-APIC and MSI devices. To use x2apic mode in the CPU's which support x2APIC enhancements or to support platforms with CPU's having > 8 bit APIC ID, say Y. # OMAP IOMMU support config OMAP_IOMMU bool "OMAP IOMMU Support" depends on ARCH_OMAP2PLUS select IOMMU_API config OMAP_IOMMU_DEBUG tristate "Export OMAP IOMMU internals in DebugFS" depends on OMAP_IOMMU && DEBUG_FS help Select this to see extensive information about the internal state of OMAP IOMMU in debugfs. Say N unless you know you need this. config TEGRA_IOMMU_GART bool "Tegra GART IOMMU Support" depends on ARCH_TEGRA_2x_SOC select IOMMU_API help Enables support for remapping discontiguous physical memory shared with the operating system into contiguous I/O virtual space through the GART (Graphics Address Relocation Table) hardware included on Tegra SoCs. config TEGRA_IOMMU_SMMU bool "Tegra SMMU IOMMU Support" depends on ARCH_TEGRA && TEGRA_AHB select IOMMU_API help Enables support for remapping discontiguous physical memory shared with the operating system into contiguous I/O virtual space through the SMMU (System Memory Management Unit) hardware included on Tegra SoCs. config EXYNOS_IOMMU bool "Exynos IOMMU Support" depends on ARCH_EXYNOS select IOMMU_API select ARM_DMA_USE_IOMMU help Support for the IOMMU (System MMU) of Samsung Exynos application processor family. This enables H/W multimedia accelerators to see non-linear physical memory chunks as linear memory in their address space. If unsure, say N here. config EXYNOS_IOMMU_DEBUG bool "Debugging log for Exynos IOMMU" depends on EXYNOS_IOMMU help Select this to see the detailed log message that shows what happens in the IOMMU driver. Say N unless you need kernel log message for IOMMU debugging. config SHMOBILE_IPMMU bool config SHMOBILE_IPMMU_TLB bool config SHMOBILE_IOMMU bool "IOMMU for Renesas IPMMU/IPMMUI" default n depends on ARM depends on ARCH_SHMOBILE || COMPILE_TEST select IOMMU_API select ARM_DMA_USE_IOMMU select SHMOBILE_IPMMU select SHMOBILE_IPMMU_TLB help Support for Renesas IPMMU/IPMMUI. This option enables remapping of DMA memory accesses from all of the IP blocks on the ICB. Warning: Drivers (including userspace drivers of UIO devices) of the IP blocks on the ICB *must* use addresses allocated from the IPMMU (iova) for DMA with this option enabled. If unsure, say N. choice prompt "IPMMU/IPMMUI address space size" default SHMOBILE_IOMMU_ADDRSIZE_2048MB depends on SHMOBILE_IOMMU help This option sets IPMMU/IPMMUI address space size by adjusting the 1st level page table size. The page table size is calculated as follows: page table size = number of page table entries * 4 bytes number of page table entries = address space size / 1 MiB For example, when the address space size is 2048 MiB, the 1st level page table size is 8192 bytes. config SHMOBILE_IOMMU_ADDRSIZE_2048MB bool "2 GiB" config SHMOBILE_IOMMU_ADDRSIZE_1024MB bool "1 GiB" config SHMOBILE_IOMMU_ADDRSIZE_512MB bool "512 MiB" config SHMOBILE_IOMMU_ADDRSIZE_256MB bool "256 MiB" config SHMOBILE_IOMMU_ADDRSIZE_128MB bool "128 MiB" config SHMOBILE_IOMMU_ADDRSIZE_64MB bool "64 MiB" config SHMOBILE_IOMMU_ADDRSIZE_32MB bool "32 MiB" endchoice config SHMOBILE_IOMMU_L1SIZE int default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB config IPMMU_VMSA bool "Renesas VMSA-compatible IPMMU" depends on ARM_LPAE depends on ARCH_SHMOBILE || COMPILE_TEST select IOMMU_API select ARM_DMA_USE_IOMMU help Support for the Renesas VMSA-compatible IPMMU Renesas found in the R-Mobile APE6 and R-Car H2/M2 SoCs. If unsure, say N. config SPAPR_TCE_IOMMU bool "sPAPR TCE IOMMU Support" depends on PPC_POWERNV || PPC_PSERIES select IOMMU_API help Enables bits of IOMMU API required by VFIO. The iommu_ops is not implemented as it is not necessary for VFIO. config ARM_SMMU bool "ARM Ltd. System MMU (SMMU) Support" depends on ARM64 || (ARM_LPAE && OF) select IOMMU_API select ARM_DMA_USE_IOMMU if ARM help Support for implementations of the ARM System MMU architecture versions 1 and 2. The driver supports both v7l and v8l table formats with 4k and 64k page sizes. Say Y here if your SoC includes an IOMMU device implementing the ARM SMMU architecture. endif # IOMMU_SUPPORT |