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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 | /* * Copyright 2013 Texas Instruments, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include "skeleton.dtsi" / { model = "Texas Instruments Keystone 2 SoC"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&gic>; aliases { serial0 = &uart0; }; memory { reg = <0x00000000 0x80000000 0x00000000 0x40000000>; }; gic: interrupt-controller { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x0 0x02561000 0x0 0x1000>, <0x0 0x02562000 0x0 0x2000>, <0x0 0x02564000 0x0 0x1000>, <0x0 0x02566000 0x0 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; timer { compatible = "arm,armv7-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; pmu { compatible = "arm,cortex-a15-pmu"; interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "ti,keystone","simple-bus"; interrupt-parent = <&gic>; ranges = <0x0 0x0 0x0 0xc0000000>; dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; pllctrl: pll-controller@02310000 { compatible = "ti,keystone-pllctrl", "syscon"; reg = <0x02310000 0x200>; }; devctrl: device-state-control@02620000 { compatible = "ti,keystone-devctrl", "syscon"; reg = <0x02620000 0x1000>; }; rstctrl: reset-controller { compatible = "ti,keystone-reset"; ti,syscon-pll = <&pllctrl 0xe4>; ti,syscon-dev = <&devctrl 0x328>; ti,wdt-list = <0>; }; /include/ "keystone-clocks.dtsi" uart0: serial@02530c00 { compatible = "ns16550a"; current-speed = <115200>; reg-shift = <2>; reg-io-width = <4>; reg = <0x02530c00 0x100>; clocks = <&clkuart0>; interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; }; uart1: serial@02531000 { compatible = "ns16550a"; current-speed = <115200>; reg-shift = <2>; reg-io-width = <4>; reg = <0x02531000 0x100>; clocks = <&clkuart1>; interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; }; i2c0: i2c@2530000 { compatible = "ti,davinci-i2c"; reg = <0x02530000 0x400>; clock-frequency = <100000>; clocks = <&clki2c>; interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; }; i2c1: i2c@2530400 { compatible = "ti,davinci-i2c"; reg = <0x02530400 0x400>; clock-frequency = <100000>; clocks = <&clki2c>; interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; }; i2c2: i2c@2530800 { compatible = "ti,davinci-i2c"; reg = <0x02530800 0x400>; clock-frequency = <100000>; clocks = <&clki2c>; interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; }; spi0: spi@21000400 { compatible = "ti,dm6441-spi"; reg = <0x21000400 0x200>; num-cs = <4>; ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; #address-cells = <1>; #size-cells = <0>; }; spi1: spi@21000600 { compatible = "ti,dm6441-spi"; reg = <0x21000600 0x200>; num-cs = <4>; ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; #address-cells = <1>; #size-cells = <0>; }; spi2: spi@21000800 { compatible = "ti,dm6441-spi"; reg = <0x21000800 0x200>; num-cs = <4>; ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; #address-cells = <1>; #size-cells = <0>; }; usb_phy: usb_phy@2620738 { compatible = "ti,keystone-usbphy"; #address-cells = <1>; #size-cells = <1>; reg = <0x2620738 24>; status = "disabled"; }; usb: usb@2680000 { compatible = "ti,keystone-dwc3"; #address-cells = <1>; #size-cells = <1>; reg = <0x2680000 0x10000>; clocks = <&clkusb>; clock-names = "usb"; interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; ranges; dma-coherent; dma-ranges; status = "disabled"; dwc3@2690000 { compatible = "synopsys,dwc3"; reg = <0x2690000 0x70000>; interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; usb-phy = <&usb_phy>, <&usb_phy>; }; }; wdt: wdt@022f0080 { compatible = "ti,keystone-wdt","ti,davinci-wdt"; reg = <0x022f0080 0x80>; clocks = <&clkwdtimer0>; }; clock_event: timer@22f0000 { compatible = "ti,keystone-timer"; reg = <0x022f0000 0x80>; interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; clocks = <&clktimer15>; }; gpio0: gpio@260bf00 { compatible = "ti,keystone-gpio"; reg = <0x0260bf00 0x100>; gpio-controller; #gpio-cells = <2>; /* HW Interrupts mapped to GPIO pins */ interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; clocks = <&clkgpio>; clock-names = "gpio"; ti,ngpio = <32>; ti,davinci-gpio-unbanked = <32>; }; aemif: aemif@21000A00 { compatible = "ti,keystone-aemif", "ti,davinci-aemif"; #address-cells = <2>; #size-cells = <1>; clocks = <&clkaemif>; clock-names = "aemif"; clock-ranges; reg = <0x21000A00 0x00000100>; ranges = <0 0 0x30000000 0x10000000 1 0 0x21000A00 0x00000100>; }; mdio: mdio@02090300 { compatible = "ti,keystone_mdio", "ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x02090300 0x100>; status = "disabled"; clocks = <&clkpa>; clock-names = "fck"; bus_freq = <2500000>; }; kirq0: keystone_irq@26202a0 { compatible = "ti,keystone-irq"; interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; interrupt-controller; #interrupt-cells = <1>; ti,syscon-dev = <&devctrl 0x2a0>; }; }; }; |