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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 | /* * Device Tree Source for OMAP243x SoC * * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #include "omap2.dtsi" / { compatible = "ti,omap2430", "ti,omap2"; ocp { prcm: prcm@49006000 { compatible = "ti,omap2-prcm"; reg = <0x49006000 0x1000>; prcm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; }; prcm_clockdomains: clockdomains { }; }; scrm: scrm@49002000 { compatible = "ti,omap2-scrm"; reg = <0x49002000 0x1000>; scrm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; }; scrm_clockdomains: clockdomains { }; }; counter32k: counter@49020000 { compatible = "ti,omap-counter32k"; reg = <0x49020000 0x20>; ti,hwmods = "counter_32k"; }; omap2430_pmx: pinmux@49002030 { compatible = "ti,omap2430-padconf", "pinctrl-single"; reg = <0x49002030 0x0154>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <8>; pinctrl-single,function-mask = <0x3f>; }; omap2_scm_general: tisyscon@49002270 { compatible = "syscon"; reg = <0x49002270 0x240>; }; pbias_regulator: pbias_regulator { compatible = "ti,pbias-omap"; reg = <0x230 0x4>; syscon = <&omap2_scm_general>; pbias_mmc_reg: pbias_mmc_omap2430 { regulator-name = "pbias_mmc_omap2430"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3000000>; }; }; gpio1: gpio@4900c000 { compatible = "ti,omap2-gpio"; reg = <0x4900c000 0x200>; interrupts = <29>; ti,hwmods = "gpio1"; ti,gpio-always-on; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; gpio2: gpio@4900e000 { compatible = "ti,omap2-gpio"; reg = <0x4900e000 0x200>; interrupts = <30>; ti,hwmods = "gpio2"; ti,gpio-always-on; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; gpio3: gpio@49010000 { compatible = "ti,omap2-gpio"; reg = <0x49010000 0x200>; interrupts = <31>; ti,hwmods = "gpio3"; ti,gpio-always-on; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; gpio4: gpio@49012000 { compatible = "ti,omap2-gpio"; reg = <0x49012000 0x200>; interrupts = <32>; ti,hwmods = "gpio4"; ti,gpio-always-on; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; gpio5: gpio@480b6000 { compatible = "ti,omap2-gpio"; reg = <0x480b6000 0x200>; interrupts = <33>; ti,hwmods = "gpio5"; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; gpmc: gpmc@6e000000 { compatible = "ti,omap2430-gpmc"; reg = <0x6e000000 0x1000>; #address-cells = <2>; #size-cells = <1>; interrupts = <20>; gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; }; mcbsp1: mcbsp@48074000 { compatible = "ti,omap2430-mcbsp"; reg = <0x48074000 0xff>; reg-names = "mpu"; interrupts = <64>, /* OCP compliant interrupt */ <59>, /* TX interrupt */ <60>, /* RX interrupt */ <61>; /* RX overflow interrupt */ interrupt-names = "common", "tx", "rx", "rx_overflow"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; dmas = <&sdma 31>, <&sdma 32>; dma-names = "tx", "rx"; status = "disabled"; }; mcbsp2: mcbsp@48076000 { compatible = "ti,omap2430-mcbsp"; reg = <0x48076000 0xff>; reg-names = "mpu"; interrupts = <16>, /* OCP compliant interrupt */ <62>, /* TX interrupt */ <63>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; dmas = <&sdma 33>, <&sdma 34>; dma-names = "tx", "rx"; status = "disabled"; }; mcbsp3: mcbsp@4808c000 { compatible = "ti,omap2430-mcbsp"; reg = <0x4808c000 0xff>; reg-names = "mpu"; interrupts = <17>, /* OCP compliant interrupt */ <89>, /* TX interrupt */ <90>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; dmas = <&sdma 17>, <&sdma 18>; dma-names = "tx", "rx"; status = "disabled"; }; mcbsp4: mcbsp@4808e000 { compatible = "ti,omap2430-mcbsp"; reg = <0x4808e000 0xff>; reg-names = "mpu"; interrupts = <18>, /* OCP compliant interrupt */ <54>, /* TX interrupt */ <55>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; dmas = <&sdma 19>, <&sdma 20>; dma-names = "tx", "rx"; status = "disabled"; }; mcbsp5: mcbsp@48096000 { compatible = "ti,omap2430-mcbsp"; reg = <0x48096000 0xff>; reg-names = "mpu"; interrupts = <19>, /* OCP compliant interrupt */ <81>, /* TX interrupt */ <82>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp5"; dmas = <&sdma 21>, <&sdma 22>; dma-names = "tx", "rx"; status = "disabled"; }; mmc1: mmc@4809c000 { compatible = "ti,omap2-hsmmc"; reg = <0x4809c000 0x200>; interrupts = <83>; ti,hwmods = "mmc1"; ti,dual-volt; dmas = <&sdma 61>, <&sdma 62>; dma-names = "tx", "rx"; pbias-supply = <&pbias_mmc_reg>; }; mmc2: mmc@480b4000 { compatible = "ti,omap2-hsmmc"; reg = <0x480b4000 0x200>; interrupts = <86>; ti,hwmods = "mmc2"; dmas = <&sdma 47>, <&sdma 48>; dma-names = "tx", "rx"; }; mailbox: mailbox@48094000 { compatible = "ti,omap2-mailbox"; reg = <0x48094000 0x200>; interrupts = <26>; ti,hwmods = "mailbox"; }; timer1: timer@49018000 { compatible = "ti,omap2420-timer"; reg = <0x49018000 0x400>; interrupts = <37>; ti,hwmods = "timer1"; ti,timer-alwon; }; mcspi3: mcspi@480b8000 { compatible = "ti,omap2-mcspi"; ti,hwmods = "mcspi3"; reg = <0x480b8000 0x100>; interrupts = <91>; dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; dma-names = "tx0", "rx0", "tx1", "rx1"; }; usb_otg_hs: usb_otg_hs@480ac000 { compatible = "ti,omap2-musb"; ti,hwmods = "usb_otg_hs"; reg = <0x480ac000 0x1000>; interrupts = <93>; }; wd_timer2: wdt@49016000 { compatible = "ti,omap2-wdt"; ti,hwmods = "wd_timer2"; reg = <0x49016000 0x80>; }; }; }; &i2c1 { compatible = "ti,omap2430-i2c"; }; &i2c2 { compatible = "ti,omap2430-i2c"; }; |