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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 | /* * Copyright IBM Corp. 1999, 2011 * * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, */ #ifndef __ASM_CMPXCHG_H #define __ASM_CMPXCHG_H #include <linux/mmdebug.h> #include <linux/types.h> #include <linux/bug.h> extern void __xchg_called_with_bad_pointer(void); static inline unsigned long __xchg(unsigned long x, void *ptr, int size) { unsigned long addr, old; int shift; switch (size) { case 1: addr = (unsigned long) ptr; shift = (3 ^ (addr & 3)) << 3; addr ^= addr & 3; asm volatile( " l %0,%4\n" "0: lr 0,%0\n" " nr 0,%3\n" " or 0,%2\n" " cs %0,0,%4\n" " jl 0b\n" : "=&d" (old), "=Q" (*(int *) addr) : "d" ((x & 0xff) << shift), "d" (~(0xff << shift)), "Q" (*(int *) addr) : "memory", "cc", "0"); return old >> shift; case 2: addr = (unsigned long) ptr; shift = (2 ^ (addr & 2)) << 3; addr ^= addr & 2; asm volatile( " l %0,%4\n" "0: lr 0,%0\n" " nr 0,%3\n" " or 0,%2\n" " cs %0,0,%4\n" " jl 0b\n" : "=&d" (old), "=Q" (*(int *) addr) : "d" ((x & 0xffff) << shift), "d" (~(0xffff << shift)), "Q" (*(int *) addr) : "memory", "cc", "0"); return old >> shift; case 4: asm volatile( " l %0,%3\n" "0: cs %0,%2,%3\n" " jl 0b\n" : "=&d" (old), "=Q" (*(int *) ptr) : "d" (x), "Q" (*(int *) ptr) : "memory", "cc"); return old; #ifdef CONFIG_64BIT case 8: asm volatile( " lg %0,%3\n" "0: csg %0,%2,%3\n" " jl 0b\n" : "=&d" (old), "=m" (*(long *) ptr) : "d" (x), "Q" (*(long *) ptr) : "memory", "cc"); return old; #endif /* CONFIG_64BIT */ } __xchg_called_with_bad_pointer(); return x; } #define xchg(ptr, x) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __xchg((unsigned long)(x), (void *)(ptr), sizeof(*(ptr)));\ __ret; \ }) /* * Atomic compare and exchange. Compare OLD with MEM, if identical, * store NEW in MEM. Return the initial value in MEM. Success is * indicated by comparing RETURN with OLD. */ #define __HAVE_ARCH_CMPXCHG extern void __cmpxchg_called_with_bad_pointer(void); static inline unsigned long __cmpxchg(void *ptr, unsigned long old, unsigned long new, int size) { unsigned long addr, prev, tmp; int shift; switch (size) { case 1: addr = (unsigned long) ptr; shift = (3 ^ (addr & 3)) << 3; addr ^= addr & 3; asm volatile( " l %0,%2\n" "0: nr %0,%5\n" " lr %1,%0\n" " or %0,%3\n" " or %1,%4\n" " cs %0,%1,%2\n" " jnl 1f\n" " xr %1,%0\n" " nr %1,%5\n" " jnz 0b\n" "1:" : "=&d" (prev), "=&d" (tmp), "+Q" (*(int *) addr) : "d" ((old & 0xff) << shift), "d" ((new & 0xff) << shift), "d" (~(0xff << shift)) : "memory", "cc"); return prev >> shift; case 2: addr = (unsigned long) ptr; shift = (2 ^ (addr & 2)) << 3; addr ^= addr & 2; asm volatile( " l %0,%2\n" "0: nr %0,%5\n" " lr %1,%0\n" " or %0,%3\n" " or %1,%4\n" " cs %0,%1,%2\n" " jnl 1f\n" " xr %1,%0\n" " nr %1,%5\n" " jnz 0b\n" "1:" : "=&d" (prev), "=&d" (tmp), "+Q" (*(int *) addr) : "d" ((old & 0xffff) << shift), "d" ((new & 0xffff) << shift), "d" (~(0xffff << shift)) : "memory", "cc"); return prev >> shift; case 4: asm volatile( " cs %0,%3,%1\n" : "=&d" (prev), "=Q" (*(int *) ptr) : "0" (old), "d" (new), "Q" (*(int *) ptr) : "memory", "cc"); return prev; #ifdef CONFIG_64BIT case 8: asm volatile( " csg %0,%3,%1\n" : "=&d" (prev), "=Q" (*(long *) ptr) : "0" (old), "d" (new), "Q" (*(long *) ptr) : "memory", "cc"); return prev; #endif /* CONFIG_64BIT */ } __cmpxchg_called_with_bad_pointer(); return old; } #define cmpxchg(ptr, o, n) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __cmpxchg((ptr), (unsigned long)(o), (unsigned long)(n), \ sizeof(*(ptr))); \ __ret; \ }) #ifdef CONFIG_64BIT #define cmpxchg64(ptr, o, n) \ ({ \ cmpxchg((ptr), (o), (n)); \ }) #else /* CONFIG_64BIT */ static inline unsigned long long __cmpxchg64(void *ptr, unsigned long long old, unsigned long long new) { register_pair rp_old = {.pair = old}; register_pair rp_new = {.pair = new}; asm volatile( " cds %0,%2,%1" : "+&d" (rp_old), "=Q" (ptr) : "d" (rp_new), "Q" (ptr) : "memory", "cc"); return rp_old.pair; } #define cmpxchg64(ptr, o, n) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __cmpxchg64((ptr), \ (unsigned long long)(o), \ (unsigned long long)(n)); \ __ret; \ }) #endif /* CONFIG_64BIT */ #define __cmpxchg_double_op(p1, p2, o1, o2, n1, n2, insn) \ ({ \ register __typeof__(*(p1)) __old1 asm("2") = (o1); \ register __typeof__(*(p2)) __old2 asm("3") = (o2); \ register __typeof__(*(p1)) __new1 asm("4") = (n1); \ register __typeof__(*(p2)) __new2 asm("5") = (n2); \ int cc; \ asm volatile( \ insn " %[old],%[new],%[ptr]\n" \ " ipm %[cc]\n" \ " srl %[cc],28" \ : [cc] "=d" (cc), [old] "+d" (__old1), "+d" (__old2) \ : [new] "d" (__new1), "d" (__new2), \ [ptr] "Q" (*(p1)), "Q" (*(p2)) \ : "memory", "cc"); \ !cc; \ }) #define __cmpxchg_double_4(p1, p2, o1, o2, n1, n2) \ __cmpxchg_double_op(p1, p2, o1, o2, n1, n2, "cds") #define __cmpxchg_double_8(p1, p2, o1, o2, n1, n2) \ __cmpxchg_double_op(p1, p2, o1, o2, n1, n2, "cdsg") extern void __cmpxchg_double_called_with_bad_pointer(void); #define __cmpxchg_double(p1, p2, o1, o2, n1, n2) \ ({ \ int __ret; \ switch (sizeof(*(p1))) { \ case 4: \ __ret = __cmpxchg_double_4(p1, p2, o1, o2, n1, n2); \ break; \ case 8: \ __ret = __cmpxchg_double_8(p1, p2, o1, o2, n1, n2); \ break; \ default: \ __cmpxchg_double_called_with_bad_pointer(); \ } \ __ret; \ }) #define cmpxchg_double(p1, p2, o1, o2, n1, n2) \ ({ \ __typeof__(p1) __p1 = (p1); \ __typeof__(p2) __p2 = (p2); \ int __ret; \ BUILD_BUG_ON(sizeof(*(p1)) != sizeof(long)); \ BUILD_BUG_ON(sizeof(*(p2)) != sizeof(long)); \ VM_BUG_ON((unsigned long)((__p1) + 1) != (unsigned long)(__p2));\ if (sizeof(long) == 4) \ __ret = __cmpxchg_double_4(__p1, __p2, o1, o2, n1, n2); \ else \ __ret = __cmpxchg_double_8(__p1, __p2, o1, o2, n1, n2); \ __ret; \ }) #define system_has_cmpxchg_double() 1 #include <asm-generic/cmpxchg-local.h> static inline unsigned long __cmpxchg_local(void *ptr, unsigned long old, unsigned long new, int size) { switch (size) { case 1: case 2: case 4: #ifdef CONFIG_64BIT case 8: #endif return __cmpxchg(ptr, old, new, size); default: return __cmpxchg_local_generic(ptr, old, new, size); } return old; } /* * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make * them available. */ #define cmpxchg_local(ptr, o, n) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __cmpxchg_local((ptr), (unsigned long)(o), \ (unsigned long)(n), sizeof(*(ptr))); \ __ret; \ }) #define cmpxchg64_local(ptr, o, n) cmpxchg64((ptr), (o), (n)) #endif /* __ASM_CMPXCHG_H */ |