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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 | /* * Copyright (C) 2001 Dave Engebretsen, IBM Corporation * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM * * RTAS specific routines for PCI. * * Based on code from pci.c, chrp_pci.c and pSeries_pci.c * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/kernel.h> #include <linux/threads.h> #include <linux/pci.h> #include <linux/string.h> #include <linux/init.h> #include <linux/bootmem.h> #include <asm/io.h> #include <asm/pgtable.h> #include <asm/irq.h> #include <asm/prom.h> #include <asm/machdep.h> #include <asm/pci-bridge.h> #include <asm/iommu.h> #include <asm/rtas.h> #include <asm/mpic.h> #include <asm/ppc-pci.h> #include <asm/eeh.h> /* RTAS tokens */ static int read_pci_config; static int write_pci_config; static int ibm_read_pci_config; static int ibm_write_pci_config; static inline int config_access_valid(struct pci_dn *dn, int where) { if (where < 256) return 1; if (where < 4096 && dn->pci_ext_config_space) return 1; return 0; } static int of_device_available(struct device_node * dn) { const char *status; status = of_get_property(dn, "status", NULL); if (!status) return 1; if (!strcmp(status, "okay")) return 1; return 0; } int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) { int returnval = -1; unsigned long buid, addr; int ret; if (!pdn) return PCIBIOS_DEVICE_NOT_FOUND; if (!config_access_valid(pdn, where)) return PCIBIOS_BAD_REGISTER_NUMBER; addr = rtas_config_addr(pdn->busno, pdn->devfn, where); buid = pdn->phb->buid; if (buid) { ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, addr, BUID_HI(buid), BUID_LO(buid), size); } else { ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); } *val = returnval; if (ret) return PCIBIOS_DEVICE_NOT_FOUND; if (returnval == EEH_IO_ERROR_VALUE(size) && eeh_dn_check_failure (pdn->node, NULL)) return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_SUCCESSFUL; } static int rtas_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { struct device_node *busdn, *dn; if (bus->self) busdn = pci_device_to_OF_node(bus->self); else busdn = bus->sysdata; /* must be a phb */ /* Search only direct children of the bus */ for (dn = busdn->child; dn; dn = dn->sibling) { struct pci_dn *pdn = PCI_DN(dn); if (pdn && pdn->devfn == devfn && of_device_available(dn)) return rtas_read_config(pdn, where, size, val); } return PCIBIOS_DEVICE_NOT_FOUND; } int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) { unsigned long buid, addr; int ret; if (!pdn) return PCIBIOS_DEVICE_NOT_FOUND; if (!config_access_valid(pdn, where)) return PCIBIOS_BAD_REGISTER_NUMBER; addr = rtas_config_addr(pdn->busno, pdn->devfn, where); buid = pdn->phb->buid; if (buid) { ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, BUID_HI(buid), BUID_LO(buid), size, (ulong) val); } else { ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); } if (ret) return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_SUCCESSFUL; } static int rtas_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { struct device_node *busdn, *dn; if (bus->self) busdn = pci_device_to_OF_node(bus->self); else busdn = bus->sysdata; /* must be a phb */ /* Search only direct children of the bus */ for (dn = busdn->child; dn; dn = dn->sibling) { struct pci_dn *pdn = PCI_DN(dn); if (pdn && pdn->devfn == devfn && of_device_available(dn)) return rtas_write_config(pdn, where, size, val); } return PCIBIOS_DEVICE_NOT_FOUND; } struct pci_ops rtas_pci_ops = { rtas_pci_read_config, rtas_pci_write_config }; int is_python(struct device_node *dev) { const char *model = of_get_property(dev, "model", NULL); if (model && strstr(model, "Python")) return 1; return 0; } static void python_countermeasures(struct device_node *dev) { struct resource registers; void __iomem *chip_regs; volatile u32 val; if (of_address_to_resource(dev, 0, ®isters)) { printk(KERN_ERR "Can't get address for Python workarounds !\n"); return; } /* Python's register file is 1 MB in size. */ chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000); /* * Firmware doesn't always clear this bit which is critical * for good performance - Anton */ #define PRG_CL_RESET_VALID 0x00010000 val = in_be32(chip_regs + 0xf6030); if (val & PRG_CL_RESET_VALID) { printk(KERN_INFO "Python workaround: "); val &= ~PRG_CL_RESET_VALID; out_be32(chip_regs + 0xf6030, val); /* * We must read it back for changes to * take effect */ val = in_be32(chip_regs + 0xf6030); printk("reg0: %x\n", val); } iounmap(chip_regs); } void __init init_pci_config_tokens (void) { read_pci_config = rtas_token("read-pci-config"); write_pci_config = rtas_token("write-pci-config"); ibm_read_pci_config = rtas_token("ibm,read-pci-config"); ibm_write_pci_config = rtas_token("ibm,write-pci-config"); } unsigned long __devinit get_phb_buid (struct device_node *phb) { struct resource r; if (ibm_read_pci_config == -1) return 0; if (of_address_to_resource(phb, 0, &r)) return 0; return r.start; } static int phb_set_bus_ranges(struct device_node *dev, struct pci_controller *phb) { const int *bus_range; unsigned int len; bus_range = of_get_property(dev, "bus-range", &len); if (bus_range == NULL || len < 2 * sizeof(int)) { return 1; } phb->first_busno = bus_range[0]; phb->last_busno = bus_range[1]; return 0; } int __devinit rtas_setup_phb(struct pci_controller *phb) { struct device_node *dev = phb->arch_data; if (is_python(dev)) python_countermeasures(dev); if (phb_set_bus_ranges(dev, phb)) return 1; phb->ops = &rtas_pci_ops; phb->buid = get_phb_buid(dev); return 0; } void __init find_and_init_phbs(void) { struct device_node *node; struct pci_controller *phb; struct device_node *root = of_find_node_by_path("/"); for (node = of_get_next_child(root, NULL); node != NULL; node = of_get_next_child(root, node)) { if (node->type == NULL || (strcmp(node->type, "pci") != 0 && strcmp(node->type, "pciex") != 0)) continue; phb = pcibios_alloc_controller(node); if (!phb) continue; rtas_setup_phb(phb); pci_process_bridge_OF_ranges(phb, node, 0); isa_bridge_find_early(phb); } of_node_put(root); pci_devs_phb_init(); /* * pci_probe_only and pci_assign_all_buses can be set via properties * in chosen. */ if (of_chosen) { const int *prop; prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL); if (prop) pci_probe_only = *prop; prop = of_get_property(of_chosen, "linux,pci-assign-all-buses", NULL); if (prop) pci_assign_all_buses = *prop; } } /* RPA-specific bits for removing PHBs */ int pcibios_remove_root_bus(struct pci_controller *phb) { struct pci_bus *b = phb->bus; struct resource *res; int rc, i; res = b->resource[0]; if (!res->flags) { printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__, b->name); return 1; } rc = pcibios_unmap_io_space(b); if (rc) { printk(KERN_ERR "%s: failed to unmap IO on bus %s\n", __FUNCTION__, b->name); return 1; } if (release_resource(res)) { printk(KERN_ERR "%s: failed to release IO on bus %s\n", __FUNCTION__, b->name); return 1; } for (i = 1; i < 3; ++i) { res = b->resource[i]; if (!res->flags && i == 0) { printk(KERN_ERR "%s: no MEM resource for PHB %s\n", __FUNCTION__, b->name); return 1; } if (res->flags && release_resource(res)) { printk(KERN_ERR "%s: failed to release IO %d on bus %s\n", __FUNCTION__, i, b->name); return 1; } } pcibios_free_controller(phb); return 0; } EXPORT_SYMBOL(pcibios_remove_root_bus); |