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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 | /* * MPC8272 ADS Device Tree Source * * Copyright 2005 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ / { model = "MPC8272ADS"; compatible = "MPC8260ADS"; #address-cells = <1>; #size-cells = <1>; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8272@0 { device_type = "cpu"; reg = <0>; d-cache-line-size = <20>; // 32 bytes i-cache-line-size = <20>; // 32 bytes d-cache-size = <4000>; // L1, 16K i-cache-size = <4000>; // L1, 16K timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; 32-bit; }; }; pci_pic: interrupt-controller@f8200000 { #address-cells = <0>; #interrupt-cells = <2>; interrupt-controller; reg = <f8200000 f8200004>; built-in; device_type = "pci-pic"; }; memory { device_type = "memory"; reg = <00000000 4000000 f4500000 00000020>; }; chosen { name = "chosen"; linux,platform = <0>; interrupt-controller = <&Cpm_pic>; }; soc8272@f0000000 { #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; device_type = "soc"; ranges = <00000000 f0000000 00053000>; reg = <f0000000 10000>; mdio@0 { device_type = "mdio"; compatible = "fs_enet"; reg = <0 0>; #address-cells = <1>; #size-cells = <0>; phy0:ethernet-phy@0 { interrupt-parent = <&Cpm_pic>; interrupts = <17 4>; reg = <0>; bitbang = [ 12 12 13 02 02 01 ]; device_type = "ethernet-phy"; }; phy1:ethernet-phy@1 { interrupt-parent = <&Cpm_pic>; interrupts = <17 4>; bitbang = [ 12 12 13 02 02 01 ]; reg = <3>; device_type = "ethernet-phy"; }; }; ethernet@24000 { #address-cells = <1>; #size-cells = <0>; device_type = "network"; device-id = <1>; compatible = "fs_enet"; model = "FCC"; reg = <11300 20 8400 100 11380 30>; mac-address = [ 00 11 2F 99 43 54 ]; interrupts = <20 2>; interrupt-parent = <&Cpm_pic>; phy-handle = <&Phy0>; rx-clock = <13>; tx-clock = <12>; }; ethernet@25000 { device_type = "network"; device-id = <2>; compatible = "fs_enet"; model = "FCC"; reg = <11320 20 8500 100 113b0 30>; mac-address = [ 00 11 2F 99 44 54 ]; interrupts = <21 2>; interrupt-parent = <&Cpm_pic>; phy-handle = <&Phy1>; rx-clock = <17>; tx-clock = <18>; }; cpm@f0000000 { #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; device_type = "cpm"; model = "CPM2"; ranges = <00000000 00000000 20000>; reg = <0 20000>; command-proc = <119c0>; brg-frequency = <17D7840>; cpm_clk = <BEBC200>; scc@11a00 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <1>; reg = <11a00 20 8000 100>; current-speed = <1c200>; interrupts = <28 2>; interrupt-parent = <&Cpm_pic>; clock-setup = <0 00ffffff>; rx-clock = <1>; tx-clock = <1>; }; scc@11a60 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <4>; reg = <11a60 20 8300 100>; current-speed = <1c200>; interrupts = <2b 2>; interrupt-parent = <&Cpm_pic>; clock-setup = <1b ffffff00>; rx-clock = <4>; tx-clock = <4>; }; }; cpm_pic:interrupt-controller@10c00 { #address-cells = <0>; #interrupt-cells = <2>; interrupt-controller; reg = <10c00 80>; built-in; device_type = "cpm-pic"; compatible = "CPM2"; }; pci@0500 { #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; compatible = "8272"; device_type = "pci"; reg = <10430 4dc>; clock-frequency = <3f940aa>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x16 */ b000 0 0 1 f8200000 40 8 b000 0 0 2 f8200000 41 8 b000 0 0 3 f8200000 42 8 b000 0 0 4 f8200000 43 8 /* IDSEL 0x17 */ b800 0 0 1 f8200000 43 8 b800 0 0 2 f8200000 40 8 b800 0 0 3 f8200000 41 8 b800 0 0 4 f8200000 42 8 /* IDSEL 0x18 */ c000 0 0 1 f8200000 42 8 c000 0 0 2 f8200000 43 8 c000 0 0 3 f8200000 40 8 c000 0 0 4 f8200000 41 8>; interrupt-parent = <&Cpm_pic>; interrupts = <14 8>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 40000000 01000000 0 00000000 f6000000 0 02000000>; }; /* May need to remove if on a part without crypto engine */ crypto@30000 { device_type = "crypto"; model = "SEC2"; compatible = "talitos"; reg = <30000 10000>; interrupts = <b 2>; interrupt-parent = <&Cpm_pic>; num-channels = <4>; channel-fifo-len = <18>; exec-units-mask = <0000007e>; /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ descriptor-types-mask = <01010ebf>; }; }; }; |