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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 | /* ********************************************************************** * irqmgr.c - IRQ manager for emu10k1 driver * Copyright 1999, 2000 Creative Labs, Inc. * ********************************************************************** * * Date Author Summary of changes * ---- ------ ------------------ * October 20, 1999 Bertrand Lee base code release * ********************************************************************** * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this program; if not, write to the Free * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, * USA. * ********************************************************************** */ #include "hwaccess.h" #include "8010.h" #include "cardmi.h" #include "cardmo.h" #include "irqmgr.h" /* Interrupt handler */ irqreturn_t emu10k1_interrupt(int irq, void *dev_id, struct pt_regs *regs) { struct emu10k1_card *card = (struct emu10k1_card *) dev_id; u32 irqstatus, irqstatus_tmp; int handled = 0; DPD(4, "emu10k1_interrupt called, irq = %u\n", irq); /* ** NOTE : ** We do a 'while loop' here cos on certain machines, with both ** playback and recording going on at the same time, IRQs will ** stop coming in after a while. Checking IPND indeed shows that ** there are interrupts pending but the PIC says no IRQs pending. ** I suspect that some boards need edge-triggered IRQs but are not ** getting that condition if we don't completely clear the IPND ** (make sure no more interrupts are pending). ** - Eric */ while ((irqstatus = inl(card->iobase + IPR))) { DPD(4, "irq status %#x\n", irqstatus); irqstatus_tmp = irqstatus; if (irqstatus & IRQTYPE_TIMER) { emu10k1_timer_irqhandler(card); irqstatus &= ~IRQTYPE_TIMER; } if (irqstatus & IRQTYPE_DSP) { emu10k1_dsp_irqhandler(card); irqstatus &= ~IRQTYPE_DSP; } if (irqstatus & IRQTYPE_MPUIN) { emu10k1_mpuin_irqhandler(card); irqstatus &= ~IRQTYPE_MPUIN; } if (irqstatus & IRQTYPE_MPUOUT) { emu10k1_mpuout_irqhandler(card); irqstatus &= ~IRQTYPE_MPUOUT; } if (irqstatus & IPR_MUTE) { emu10k1_mute_irqhandler(card); irqstatus &=~IPR_MUTE; } if (irqstatus & IPR_VOLINCR) { emu10k1_volincr_irqhandler(card); irqstatus &=~IPR_VOLINCR; } if (irqstatus & IPR_VOLDECR) { emu10k1_voldecr_irqhandler(card); irqstatus &=~IPR_VOLDECR; } if (irqstatus){ printk(KERN_ERR "emu10k1: Warning, unhandled interrupt: %#08x\n", irqstatus); //make sure any interrupts we don't handle are disabled: emu10k1_irq_disable(card, ~(INTE_MIDIRXENABLE | INTE_MIDITXENABLE | INTE_INTERVALTIMERENB | INTE_VOLDECRENABLE | INTE_VOLINCRENABLE | INTE_MUTEENABLE | INTE_FXDSPENABLE)); } /* acknowledge interrupt */ outl(irqstatus_tmp, card->iobase + IPR); handled = 1; } return IRQ_RETVAL(handled); } |