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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 | /* * Copyright 2001 MontaVista Software Inc. * Author: MontaVista Software, Inc. * ahennessy@mvista.com * * Copyright (C) 2000-2001 Toshiba Corporation * * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c * * Define the pci_ops for the Toshiba rbtx4927 * * Much of the code is derived from the original DDB5074 port by * Geert Uytterhoeven <geert@sonycom.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/types.h> #include <linux/pci.h> #include <linux/kernel.h> #include <linux/init.h> #include <asm/addrspace.h> #include <asm/pci_channel.h> #include <asm/tx4927/tx4927_pci.h> #include <asm/debug.h> /* initialize in setup */ struct resource pci_io_resource = { "pci IO space", (PCIBIOS_MIN_IO), ((PCIBIOS_MIN_IO) + (TX4927_PCIIO_SIZE)) - 1, IORESOURCE_IO }; /* initialize in setup */ struct resource pci_mem_resource = { "pci memory space", TX4927_PCIMEM, TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1, IORESOURCE_MEM }; extern struct pci_ops tx4927_pci_ops; struct pci_channel mips_pci_channels[] = { /* h/w only supports devices 0x00 to 0x14 */ {&tx4927_pci_ops, &pci_io_resource, &pci_mem_resource, PCI_DEVFN(0x00, 0), PCI_DEVFN(0x14, 7)}, {NULL, NULL, NULL, 0, 0} }; unsigned int pcibios_assign_all_busses(void) { return 1; } static int mkaddr(unsigned char bus, unsigned char dev_fn, unsigned char where, int *flagsp) { if (bus > 0) { /* Type 1 configuration */ tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1; } else { if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0)) return -1; /* Type 0 configuration */ tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | ((dev_fn & 0xff) << 0x08) | (where & 0xfc); } /* clear M_ABORT and Disable M_ABORT Int. */ tx4927_pcicptr->pcistatus = (tx4927_pcicptr->pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT << 16); tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT; return 0; } static int check_abort(int flags) { int code = PCIBIOS_SUCCESSFUL; if (tx4927_pcicptr-> pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) { tx4927_pcicptr->pcistatus = (tx4927_pcicptr-> pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT << 16); tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT; code = PCIBIOS_DEVICE_NOT_FOUND; // printk("returning PCIBIOS_DEVICE_NOT_FOUND\n"); } return code; } /* * We can't address 8 and 16 bit words directly. Instead we have to * read/write a 32bit word and mask/modify the data we actually want. */ static int tx4927_pcibios_read_config_byte(struct pci_dev *dev, int where, unsigned char *val) { int flags, retval; unsigned char bus, func_num; db_assert((where & 3) == 0); db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; #ifdef __BIG_ENDIAN *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | ((where & 3) ^ 3)); #else *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | (where & 3)); #endif retval = check_abort(flags); if (retval == PCIBIOS_DEVICE_NOT_FOUND) *val = 0xff; //printk("CFG R1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val ); return retval; } static int tx4927_pcibios_read_config_word(struct pci_dev *dev, int where, unsigned short *val) { int flags, retval; unsigned char bus, func_num; if (where & 1) return PCIBIOS_BAD_REGISTER_NUMBER; db_assert((where & 3) == 0); db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; #ifdef __BIG_ENDIAN *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | ((where & 3) ^ 2)); #else *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | (where & 3)); #endif retval = check_abort(flags); if (retval == PCIBIOS_DEVICE_NOT_FOUND) *val = 0xffff; //printk("CFG R2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val ); return retval; } static int tx4927_pcibios_read_config_dword(struct pci_dev *dev, int where, unsigned int *val) { int flags, retval; unsigned char bus, func_num; if (where & 3) return PCIBIOS_BAD_REGISTER_NUMBER; db_assert((where & 3) == 0); db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; *val = tx4927_pcicptr->g2pcfgdata; retval = check_abort(flags); if (retval == PCIBIOS_DEVICE_NOT_FOUND) *val = 0xffffffff; //printk("CFG R4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val ); return retval; } static int tx4927_pcibios_write_config_byte(struct pci_dev *dev, int where, unsigned char val) { int flags; unsigned char bus, func_num; /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; #ifdef __BIG_ENDIAN *(volatile u8 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | ((where & 3) ^ 3)) = val; #else *(volatile u8 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | (where & 3)) = val; #endif //printk("CFG W1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val ); return check_abort(flags); } static int tx4927_pcibios_write_config_word(struct pci_dev *dev, int where, unsigned short val) { int flags; unsigned char bus, func_num; if (where & 1) return PCIBIOS_BAD_REGISTER_NUMBER; /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; #ifdef __BIG_ENDIAN *(volatile u16 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | ((where & 3) ^ 2)) = val; #else *(volatile u16 *) ((ulong) & tx4927_pcicptr-> g2pcfgdata | (where & 3)) = val; #endif //printk("CFG W2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val ); return check_abort(flags); } static int tx4927_pcibios_write_config_dword(struct pci_dev *dev, int where, unsigned int val) { int flags; unsigned char bus, func_num; if (where & 3) return PCIBIOS_BAD_REGISTER_NUMBER; /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; db_assert(bus != 0); } else { bus = 0; } func_num = PCI_FUNC(dev->devfn); if (mkaddr(bus, dev->devfn, where, &flags)) return -1; tx4927_pcicptr->g2pcfgdata = val; //printk("CFG W4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val ); return check_abort(flags); } struct pci_ops tx4927_pci_ops = { tx4927_pcibios_read_config_byte, tx4927_pcibios_read_config_word, tx4927_pcibios_read_config_dword, tx4927_pcibios_write_config_byte, tx4927_pcibios_write_config_word, tx4927_pcibios_write_config_dword }; |