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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 | /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 Waldorf GMBH * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001 Ralf Baechle * Copyright (C) 1996 Paul M. Antoine * Copyright (C) 1999 Silicon Graphics, Inc. */ #ifndef _ASM_PROCESSOR_H #define _ASM_PROCESSOR_H #include <linux/config.h> #include <asm/isadep.h> /* * Default implementation of macro that returns current * instruction pointer ("program counter"). */ #define current_text_addr() ({ __label__ _l; _l: &&_l;}) #if !defined (_LANGUAGE_ASSEMBLY) #include <linux/threads.h> #include <asm/cachectl.h> #include <asm/mipsregs.h> #include <asm/reg.h> #include <asm/system.h> struct mips_cpuinfo { unsigned long udelay_val; unsigned long *pgd_quick; unsigned long *pte_quick; unsigned long pgtable_cache_sz; }; /* * System setup and hardware flags.. * XXX: Should go into mips_cpuinfo. */ extern void (*cpu_wait)(void); /* only available on R4[26]00 and R3081 */ extern void r3081_wait(void); extern void r4k_wait(void); extern char cyclecounter_available; /* only available from R4000 upwards. */ extern struct mips_cpuinfo boot_cpu_data; extern unsigned int vced_count, vcei_count; #ifdef CONFIG_SMP extern struct mips_cpuinfo cpu_data[]; #define current_cpu_data cpu_data[smp_processor_id()] #else #define cpu_data &boot_cpu_data #define current_cpu_data boot_cpu_data #endif /* * Bus types (default is ISA, but people can check others with these..) * MCA_bus hardcoded to 0 for now. * * This needs to be extended since MIPS systems are being delivered with * numerous different types of bus systems. */ extern int EISA_bus; #define MCA_bus 0 #define MCA_bus__is_a_macro /* for versions in ksyms.c */ /* * MIPS has no problems with write protection */ #define wp_works_ok 1 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ /* Lazy FPU handling on uni-processor */ extern struct task_struct *last_task_used_math; /* * User space process size: 2GB. This is hardcoded into a few places, * so don't change it unless you know what you are doing. TASK_SIZE * for a 64 bit kernel expandable to 8192EB, of which the current MIPS * implementations will "only" be able to use 1TB ... */ #define TASK_SIZE (0x7fff8000UL) /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) /* * Size of io_bitmap in longwords: 32 is ports 0-0x3ff. */ #define IO_BITMAP_SIZE 32 #define NUM_FPU_REGS 32 struct mips_fpu_hard_struct { double fp_regs[NUM_FPU_REGS]; unsigned int control; }; /* * It would be nice to add some more fields for emulator statistics, but there * are a number of fixed offsets in offset.h and elsewhere that would have to * be recalculated by hand. So the additional information will be private to * the FPU emulator for now. See asm-mips/fpu_emulator.h. */ typedef u64 fpureg_t; struct mips_fpu_soft_struct { fpureg_t regs[NUM_FPU_REGS]; unsigned int sr; }; union mips_fpu_union { struct mips_fpu_hard_struct hard; struct mips_fpu_soft_struct soft; }; #define INIT_FPU { \ {{0,},} \ } typedef struct { unsigned long seg; } mm_segment_t; /* * If you change thread_struct remember to change the #defines below too! */ struct thread_struct { /* Saved main processor registers. */ unsigned long reg16; unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; unsigned long reg29, reg30, reg31; /* Saved cp0 stuff. */ unsigned long cp0_status; /* Saved fpu/fpu emulator stuff. */ union mips_fpu_union fpu; /* Other stuff associated with the thread. */ unsigned long cp0_badvaddr; /* Last user fault */ unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ unsigned long error_code; unsigned long trap_no; #define MF_FIXADE 1 /* Fix address errors in software */ #define MF_LOGADE 2 /* Log address errors to syslog */ unsigned long mflags; mm_segment_t current_ds; unsigned long irix_trampoline; /* Wheee... */ unsigned long irix_oldctx; /* * These are really only needed if the full FPU emulator is configured. * Would be made conditional on MIPS_FPU_EMULATOR if it weren't for the * fact that having offset.h rebuilt differently for different config * options would be asking for trouble. * * Saved EPC during delay-slot emulation (see math-emu/cp1emu.c) */ unsigned long dsemul_epc; /* * Pointer to instruction used to induce address error */ unsigned long dsemul_aerpc; }; #endif /* !defined (_LANGUAGE_ASSEMBLY) */ #define INIT_THREAD { \ /* \ * saved main processor registers \ */ \ 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, \ /* \ * saved cp0 stuff \ */ \ 0, \ /* \ * saved fpu/fpu emulator stuff \ */ \ INIT_FPU, \ /* \ * Other stuff associated with the process \ */ \ 0, 0, 0, 0, \ /* \ * For now the default is to fix address errors \ */ \ MF_FIXADE, { 0 }, 0, 0, \ /* \ * dsemul_epc and dsemul_aerpc should never be used uninitialized, \ * but... \ */ \ 0 ,0 \ } #ifdef __KERNEL__ #define KERNEL_STACK_SIZE 8192 #if !defined (_LANGUAGE_ASSEMBLY) /* Free all resources held by a thread. */ #define release_thread(thread) do { } while(0) extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) /* * Return saved PC of a blocked thread. */ extern inline unsigned long thread_saved_pc(struct thread_struct *t) { extern void ret_from_fork(void); /* New born processes are a special case */ if (t->reg31 == (unsigned long) ret_from_fork) return t->reg31; return ((unsigned long *)t->reg29)[10]; } /* * Do necessary setup to start up a newly executed thread. */ #define start_thread(regs, new_pc, new_sp) do { \ /* New thread looses kernel privileges. */ \ regs->cp0_status = (regs->cp0_status & ~(ST0_CU0|ST0_KSU)) | KU_USER;\ regs->cp0_epc = new_pc; \ regs->regs[29] = new_sp; \ current->thread.current_ds = USER_DS; \ } while (0) unsigned long get_wchan(struct task_struct *p); #define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs)) #define __KSTK_TOS(tsk) ((unsigned long)(tsk) + KERNEL_STACK_SIZE - 32) #define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc))) #define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29]))) /* Allocation and freeing of basic task resources. */ /* * NOTE! The task struct and the stack go together */ #define THREAD_SIZE (2*PAGE_SIZE) #define alloc_task_struct() \ ((struct task_struct *) __get_free_pages(GFP_KERNEL,1)) #define free_task_struct(p) free_pages((unsigned long)(p),1) #define get_task_struct(tsk) atomic_inc(&virt_to_page(tsk)->count) #define init_task (init_task_union.task) #define init_stack (init_task_union.stack) #define cpu_relax() do { } while (0) #endif /* !defined (_LANGUAGE_ASSEMBLY) */ #endif /* __KERNEL__ */ /* * Return_address is a replacement for __builtin_return_address(count) * which on certain architectures cannot reasonably be implemented in GCC * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). * Note that __builtin_return_address(x>=1) is forbidden because GCC * aborts compilation on some CPUs. It's simply not possible to unwind * some CPU's stackframes. * * __builtin_return_address works only for non-leaf functions. We avoid the * overhead of a function call by forcing the compiler to save the return * address register on the stack. */ #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) #endif /* _ASM_PROCESSOR_H */ |