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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 | /* * linux/include/asm-arm/proc-armo/system.h * * Copyright (C) 1995, 1996 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __ASM_PROC_SYSTEM_H #define __ASM_PROC_SYSTEM_H #include <asm/proc-fns.h> #define vectors_base() (0) static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { extern void __bad_xchg(volatile void *, int); switch (size) { case 1: return cpu_xchg_1(x, ptr); case 4: return cpu_xchg_4(x, ptr); default: __bad_xchg(ptr, size); } return 0; } /* * We need to turn the caches off before calling the reset vector - RiscOS * messes up if we don't */ #define proc_hard_reset() cpu_proc_fin() /* * A couple of speedups for the ARM */ /* * Save the current interrupt enable state & disable IRQs */ #define __save_flags_cli(x) \ do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ save_flags_cli\n" \ " orr %1, %0, #0x08000000\n" \ " and %0, %0, #0x0c000000\n" \ " teqp %1, #0\n" \ : "=r" (x), "=r" (temp) \ : \ : "memory"); \ } while (0) /* * Enable IRQs */ #define __sti() \ do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ sti\n" \ " bic %0, %0, #0x08000000\n" \ " teqp %0, #0\n" \ : "=r" (temp) \ : \ : "memory"); \ } while(0) /* * Disable IRQs */ #define __cli() \ do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ cli\n" \ " orr %0, %0, #0x08000000\n" \ " teqp %0, #0\n" \ : "=r" (temp) \ : \ : "memory"); \ } while(0) #define __clf() do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ clf\n" \ " orr %0, %0, #0x04000000\n" \ " teqp %0, #0\n" \ : "=r" (temp)); \ } while(0) #define __stf() do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ stf\n" \ " bic %0, %0, #0x04000000\n" \ " teqp %0, #0\n" \ : "=r" (temp)); \ } while(0) /* * save current IRQ & FIQ state */ #define __save_flags(x) \ do { \ __asm__ __volatile__( \ " mov %0, pc @ save_flags\n" \ " and %0, %0, #0x0c000000\n" \ : "=r" (x)); \ } while (0) /* * restore saved IRQ & FIQ state */ #define __restore_flags(x) \ do { \ unsigned long temp; \ __asm__ __volatile__( \ " mov %0, pc @ restore_flags\n" \ " bic %0, %0, #0x0c000000\n" \ " orr %0, %0, %1\n" \ " teqp %0, #0\n" \ : "=&r" (temp) \ : "r" (x) \ : "memory"); \ } while (0) #endif |