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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 | /* * ti113x.h 1.16 1999/10/25 20:03:34 * * The contents of this file are subject to the Mozilla Public License * Version 1.1 (the "License"); you may not use this file except in * compliance with the License. You may obtain a copy of the License * at http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and * limitations under the License. * * The initial developer of the original code is David A. Hinds * <dhinds@pcmcia.sourceforge.org>. Portions created by David A. Hinds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the * terms of the GNU Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use * your version of this file under the MPL, indicate your decision by * deleting the provisions above and replace them with the notice and * other provisions required by the GPL. If you do not delete the * provisions above, a recipient may use your version of this file * under either the MPL or the GPL. */ #ifndef _LINUX_TI113X_H #define _LINUX_TI113X_H #include <linux/config.h> /* Register definitions for TI 113X PCI-to-CardBus bridges */ /* System Control Register */ #define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */ #define TI113X_SCR_SMIROUTE 0x04000000 #define TI113X_SCR_SMISTATUS 0x02000000 #define TI113X_SCR_SMIENB 0x01000000 #define TI113X_SCR_VCCPROT 0x00200000 #define TI113X_SCR_REDUCEZV 0x00100000 #define TI113X_SCR_CDREQEN 0x00080000 #define TI113X_SCR_CDMACHAN 0x00070000 #define TI113X_SCR_SOCACTIVE 0x00002000 #define TI113X_SCR_PWRSTREAM 0x00000800 #define TI113X_SCR_DELAYUP 0x00000400 #define TI113X_SCR_DELAYDOWN 0x00000200 #define TI113X_SCR_INTERROGATE 0x00000100 #define TI113X_SCR_CLKRUN_SEL 0x00000080 #define TI113X_SCR_PWRSAVINGS 0x00000040 #define TI113X_SCR_SUBSYSRW 0x00000020 #define TI113X_SCR_CB_DPAR 0x00000010 #define TI113X_SCR_CDMA_EN 0x00000008 #define TI113X_SCR_ASYNC_IRQ 0x00000004 #define TI113X_SCR_KEEPCLK 0x00000002 #define TI113X_SCR_CLKRUN_ENA 0x00000001 #define TI122X_SCR_SER_STEP 0xc0000000 #define TI122X_SCR_INTRTIE 0x20000000 #define TI122X_SCR_CBRSVD 0x00400000 #define TI122X_SCR_MRBURSTDN 0x00008000 #define TI122X_SCR_MRBURSTUP 0x00004000 #define TI122X_SCR_RIMUX 0x00000001 /* Multimedia Control Register */ #define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */ #define TI1250_MMC_ZVOUTEN 0x80 #define TI1250_MMC_PORTSEL 0x40 #define TI1250_MMC_ZVEN1 0x02 #define TI1250_MMC_ZVEN0 0x01 #define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */ #define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */ #define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */ #define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */ #define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */ #define TI122X_IRQMUX 0x008c /* 32 bit */ /* Retry Status Register */ #define TI113X_RETRY_STATUS 0x0090 /* 8 bit */ #define TI113X_RSR_PCIRETRY 0x80 #define TI113X_RSR_CBRETRY 0x40 #define TI113X_RSR_TEXP_CBB 0x20 #define TI113X_RSR_MEXP_CBB 0x10 #define TI113X_RSR_TEXP_CBA 0x08 #define TI113X_RSR_MEXP_CBA 0x04 #define TI113X_RSR_TEXP_PCI 0x02 #define TI113X_RSR_MEXP_PCI 0x01 /* Card Control Register */ #define TI113X_CARD_CONTROL 0x0091 /* 8 bit */ #define TI113X_CCR_RIENB 0x80 #define TI113X_CCR_ZVENABLE 0x40 #define TI113X_CCR_PCI_IRQ_ENA 0x20 #define TI113X_CCR_PCI_IREQ 0x10 #define TI113X_CCR_PCI_CSC 0x08 #define TI113X_CCR_SPKROUTEN 0x02 #define TI113X_CCR_IFG 0x01 #define TI1220_CCR_PORT_SEL 0x20 #define TI122X_CCR_AUD2MUX 0x04 /* Device Control Register */ #define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */ #define TI113X_DCR_5V_FORCE 0x40 #define TI113X_DCR_3V_FORCE 0x20 #define TI113X_DCR_IMODE_MASK 0x06 #define TI113X_DCR_IMODE_ISA 0x02 #define TI113X_DCR_IMODE_SERIAL 0x04 #define TI12XX_DCR_IMODE_PCI_ONLY 0x00 #define TI12XX_DCR_IMODE_ALL_SERIAL 0x06 /* Buffer Control Register */ #define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */ #define TI113X_BCR_CB_READ_DEPTH 0x08 #define TI113X_BCR_CB_WRITE_DEPTH 0x04 #define TI113X_BCR_PCI_READ_DEPTH 0x02 #define TI113X_BCR_PCI_WRITE_DEPTH 0x01 /* Diagnostic Register */ #define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */ #define TI1250_DIAG_TRUE_VALUE 0x80 #define TI1250_DIAG_PCI_IREQ 0x40 #define TI1250_DIAG_PCI_CSC 0x20 #define TI1250_DIAG_ASYNC_CSC 0x01 /* DMA Registers */ #define TI113X_DMA_0 0x0094 /* 32 bit */ #define TI113X_DMA_1 0x0098 /* 32 bit */ /* ExCA IO offset registers */ #define TI113X_IO_OFFSET(map) (0x36+((map)<<1)) #ifdef CONFIG_CARDBUS /* * Generic TI init - TI has an extension for the * INTCTL register that sets the PCI CSC interrupt. * Make sure we set it correctly at open and init * time * - open: disable the PCI CSC interrupt. This makes * it possible to use the CSC interrupt to probe the * ISA interrupts. * - init: set the interrupt to match our PCI state. * This makes us correctly get PCI CSC interrupt * events. */ static int ti_open(pci_socket_t *socket) { u8 new, reg = exca_readb(socket, I365_INTCTL); new = reg & ~I365_INTR_ENA; if (new != reg) exca_writeb(socket, I365_INTCTL, new); return 0; } static int ti_intctl(pci_socket_t *socket) { u8 new, reg = exca_readb(socket, I365_INTCTL); new = reg & ~I365_INTR_ENA; if (socket->cb_irq) new |= I365_INTR_ENA; if (new != reg) exca_writeb(socket, I365_INTCTL, new); return 0; } static int ti_init(pci_socket_t *socket) { yenta_init(socket); ti_intctl(socket); return 0; } static struct pci_socket_ops ti_ops = { ti_open, yenta_close, ti_init, yenta_suspend, yenta_get_status, yenta_get_socket, yenta_set_socket, yenta_get_io_map, yenta_set_io_map, yenta_get_mem_map, yenta_set_mem_map, yenta_proc_setup }; #define ti_sysctl(socket) ((socket)->private[0]) #define ti_cardctl(socket) ((socket)->private[1]) #define ti_devctl(socket) ((socket)->private[2]) static int ti113x_open(pci_socket_t *socket) { ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL); ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL); ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL); ti_cardctl(socket) &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC); if (socket->cb_irq) ti_cardctl(socket) |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ; ti_open(socket); return 0; } static int ti113x_init(pci_socket_t *socket) { yenta_init(socket); config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket)); config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket)); config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket)); ti_intctl(socket); return 0; } static struct pci_socket_ops ti113x_ops = { ti113x_open, yenta_close, ti113x_init, yenta_suspend, yenta_get_status, yenta_get_socket, yenta_set_socket, yenta_get_io_map, yenta_set_io_map, yenta_get_mem_map, yenta_set_mem_map, yenta_proc_setup }; #define ti_diag(socket) ((socket)->private[0]) static int ti1250_open(pci_socket_t *socket) { ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC); ti_diag(socket) &= ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ); if (socket->cb_irq) ti_diag(socket) |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ; ti_open(socket); return 0; } static int ti1250_init(pci_socket_t *socket) { yenta_init(socket); config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket)); ti_intctl(socket); return 0; } static struct pci_socket_ops ti1250_ops = { ti1250_open, yenta_close, ti1250_init, yenta_suspend, yenta_get_status, yenta_get_socket, yenta_set_socket, yenta_get_io_map, yenta_set_io_map, yenta_get_mem_map, yenta_set_mem_map, yenta_proc_setup }; #endif /* CONFIG_CARDBUS */ #endif /* _LINUX_TI113X_H */ |