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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 | /* * linux/arch/alpha/kernel/core_polaris.c * * POLARIS chip-specific code * */ #include <linux/kernel.h> #include <linux/types.h> #include <linux/pci.h> #include <linux/sched.h> #include <linux/init.h> #include <asm/system.h> #include <asm/ptrace.h> #include <asm/pci.h> #define __EXTERN_INLINE inline #include <asm/io.h> #include <asm/core_polaris.h> #undef __EXTERN_INLINE #include "proto.h" #include "bios32.h" /* * BIOS32-style PCI interface: */ #ifdef DEBUG_CONFIG # define DBG_CFG(args) printk args #else # define DBG_CFG(args) #endif #define DEBUG_MCHECK #ifdef DEBUG_MCHECK # define DBG_MCK(args) printk args /* #define DEBUG_MCHECK_DUMP */ #else # define DBG_MCK(args) #endif static volatile unsigned int POLARIS_mcheck_expected = 0; static volatile unsigned int POLARIS_mcheck_taken = 0; static volatile unsigned short POLARIS_jd = 0; /* * Given a bus, device, and function number, compute resulting * configuration space address. This is fairly straightforward * on POLARIS, since the chip itself generates Type 0 or Type 1 * cycles automatically depending on the bus number (Bus 0 is * hardwired to Type 0, all others are Type 1. Peer bridges * are not supported). * * All types: * * 3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 * 9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * |1|1|1|1|1|0|0|1|1|1|1|1|1|1|1|0|B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|x|x| * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * * 23:16 bus number (8 bits = 128 possible buses) * 15:11 Device number (5 bits) * 10:8 function number * 7:2 register number * * Notes: * The function number selects which function of a multi-function device * (e.g., scsi and ethernet). * * The register selects a DWORD (32 bit) register offset. Hence it * doesn't get shifted by 2 bits as we want to "drop" the bottom two * bits. */ static int mk_conf_addr(u8 bus, u8 device_fn, u8 where, unsigned long *pci_addr, u8 *type1) { *type1 = (bus == 0) ? 0 : 1; *pci_addr = (bus << 16) | (device_fn << 8) | (where) | POLARIS_DENSE_CONFIG_BASE; DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x," " returning address 0x%p\n" bus, device_fn, where, *pci_addr)); return 0; } int polaris_hose_read_config_byte (u8 bus, u8 device_fn, u8 where, u8 *value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; *value = __kernel_ldbu(*(vucp)pci_addr); return PCIBIOS_SUCCESSFUL; } int polaris_hose_read_config_word (u8 bus, u8 device_fn, u8 where, u16 *value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; *value = __kernel_ldwu(*(vusp)pci_addr); return PCIBIOS_SUCCESSFUL; } int polaris_hose_read_config_dword (u8 bus, u8 device_fn, u8 where, u32 *value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; *value = *(vuip)pci_addr; return PCIBIOS_SUCCESSFUL; } int polaris_hose_write_config_byte (u8 bus, u8 device_fn, u8 where, u8 value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; __kernel_stb(value, *(vucp)pci_addr); mb(); __kernel_ldbu(*(vucp)pci_addr); return PCIBIOS_SUCCESSFUL; } int polaris_hose_write_config_word (u8 bus, u8 device_fn, u8 where, u16 value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; __kernel_stw(value, *(vusp)pci_addr); mb(); __kernel_ldbu(*(vusp)pci_addr); return PCIBIOS_SUCCESSFUL; } int polaris_hose_write_config_dword (u8 bus, u8 device_fn, u8 where, u32 value, struct linux_hose_info *hose) { unsigned long pci_addr; unsigned char type1; if (mk_conf_addr(bus, device_fn, where, &pci_addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; *(vuip)pci_addr = value; mb(); *(vuip)pci_addr; return PCIBIOS_SUCCESSFUL; } void __init polaris_init_arch(unsigned long *mem_start, unsigned long *mem_end) { /* May need to initialize error reporting (see PCICTL0/1), but * for now assume that the firmware has done the right thing * already. */ #if 0 printk("polaris_init_arch(): trusting firmware for setup\n"); #endif } int polaris_pci_clr_err(void) { POLARIS_jd = *((vusp)POLARIS_W_STATUS); DBG_MCK(("POLARIS_pci_clr_err: POLARIS_W_STATUS after read 0x%x\n", POLARIS_jd)); /* Write 1's to settable bits to clear errors */ *((vusp)POLARIS_W_STATUS) = 0x7800; mb(); POLARIS_jd = *((vusp)POLARIS_W_STATUS); return 0; } void polaris_machine_check(unsigned long vector, unsigned long la_ptr, struct pt_regs * regs) { struct el_common *mchk_header; struct el_POLARIS_sysdata_mcheck *mchk_sysdata; mchk_header = (struct el_common *)la_ptr; mchk_sysdata = (struct el_POLARIS_sysdata_mcheck *)(la_ptr+mchk_header->sys_offset); #if 0 DBG_MCK(("polaris_machine_check: vector=0x%lx la_ptr=0x%lx\n", vector, la_ptr)); DBG_MCK(("\t\t pc=0x%lx size=0x%x procoffset=0x%x sysoffset 0x%x\n", regs->pc, mchk_header->size, mchk_header->proc_offset, mchk_header->sys_offset)); DBG_MCK(("polaris_machine_check: expected %d status 0x%lx\n", POLARIS_mcheck_expected, mchk_sysdata->psc_status)); #endif #ifdef DEBUG_MCHECK_DUMP { unsigned long *ptr; int i; ptr = (unsigned long *)la_ptr; for (i = 0; i < mchk_header->size / sizeof(long); i += 2) { printk(" +%lx %lx %lx\n", i*sizeof(long), ptr[i], ptr[i+1]); } } #endif /* DEBUG_MCHECK_DUMP */ /* * Check if machine check is due to a badaddr() and if so, * ignore the machine check. */ mb(); mb(); if (POLARIS_mcheck_expected) { DBG_MCK(("POLARIS machine check expected\n")); POLARIS_mcheck_expected = 0; POLARIS_mcheck_taken = 1; mb(); mb(); draina(); polaris_pci_clr_err(); wrmces(0x7); mb(); } #if 1 else { printk("POLARIS machine check NOT expected\n") ; DBG_MCK(("polaris_machine_check: vector=0x%lx la_ptr=0x%lx\n", vector, la_ptr)); DBG_MCK(("\t\t pc=0x%lx size=0x%x procoffset=0x%x sysoffset 0x%x\n", regs->pc, mchk_header->size, mchk_header->proc_offset, mchk_header->sys_offset)); POLARIS_mcheck_expected = 0; POLARIS_mcheck_taken = 1; mb(); mb(); draina(); polaris_pci_clr_err(); wrmces(0x7); mb(); } #endif } |