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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 | /* * include/asm-mips/bitops.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (c) 1994, 1995 Ralf Baechle */ #ifndef __ASM_MIPS_BITOPS_H #define __ASM_MIPS_BITOPS_H #if __mips > 1 /* * These functions for MIPS ISA >= 2 are interrupt and SMP proof and * interrupt friendly */ #include <asm/mipsregs.h> /* * The following functions will only work for the R4000! */ extern __inline__ int set_bit(int nr, void *addr) { int mask, retval, mw; addr += ((nr >> 3) & ~3); mask = 1 << (nr & 0x1f); do { mw = load_linked(addr); retval = (mask & mw) != 0; } while (!store_conditional(addr, mw|mask)); return retval; } extern __inline__ int clear_bit(int nr, void *addr) { int mask, retval, mw; addr += ((nr >> 3) & ~3); mask = 1 << (nr & 0x1f); do { mw = load_linked(addr); retval = (mask & mw) != 0; } while (!store_conditional(addr, mw & ~mask)); return retval; } extern __inline__ int change_bit(int nr, void *addr) { int mask, retval, mw; addr += ((nr >> 3) & ~3); mask = 1 << (nr & 0x1f); do { mw = load_linked(addr); retval = (mask & mw) != 0; } while (!store_conditional(addr, mw ^ mask)); return retval; } #else /* __mips <= 1 */ /* * These functions are only used for MIPS ISA 1 CPUs. Since I don't * believe that someone ever will run Linux/SMP on such a beast I don't * worry about making them SMP proof. */ #include <asm/system.h> #ifdef __KERNEL__ /* * Only disable interrupt for kernel mode stuff to keep usermode stuff * that dares to use kernel include files alive. */ #define __flags unsigned long flags #define __cli() cli() #define __save_flags(x) save_flags(x) #define __restore_flags(x) restore_flags(x) #endif /* __KERNEL__ */ extern __inline__ int set_bit(int nr, void * addr) { int mask, retval; int *a = addr; __flags; a += nr >> 5; mask = 1 << (nr & 0x1f); __save_flags(flags); __cli(); retval = (mask & *a) != 0; *a |= mask; __restore_flags(flags); return retval; } extern __inline__ int clear_bit(int nr, void * addr) { int mask, retval; int *a = addr; __flags; a += nr >> 5; mask = 1 << (nr & 0x1f); __save_flags(flags); __cli(); retval = (mask & *a) != 0; *a &= ~mask; __restore_flags(flags); return retval; } extern __inline__ int change_bit(int nr, void * addr) { int mask, retval; int *a = addr; __flags; a += nr >> 5; mask = 1 << (nr & 0x1f); __save_flags(flags); __cli(); retval = (mask & *a) != 0; *a ^= mask; __restore_flags(flags); return retval; } #undef __flags #undef __cli() #undef __save_flags(x) #undef __restore_flags(x) #endif /* __mips <= 1 */ extern __inline__ int test_bit(int nr, const void *addr) { return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31)); } extern __inline__ int find_first_zero_bit (void *addr, unsigned size) { int res; if (!size) return 0; __asm__(".set\tnoreorder\n\t" ".set\tnoat\n" "1:\tsubu\t$1,%2,%0\n\t" "blez\t$1,2f\n\t" "lw\t$1,(%4)\n\t" "addiu\t%4,%4,4\n\t" "beql\t%1,$1,1b\n\t" "addiu\t%0,%0,32\n\t" "li\t%1,1\n" "1:\tand\t%4,$1,%1\n\t" "beq\t$0,%4,2f\n\t" "sll\t%1,%1,1\n\t" "bne\t$0,%1,1b\n\t" "add\t%0,%0,1\n\t" ".set\tat\n\t" ".set\treorder\n" "2:" : "=r" (res) : "r" ((unsigned int) 0xffffffff), "r" (size), "0" ((signed int) 0), "r" (addr) : "$1"); return res; } extern __inline__ int find_next_zero_bit (void * addr, int size, int offset) { unsigned long * p = ((unsigned long *) addr) + (offset >> 5); int set = 0, bit = offset & 31, res; if (bit) { /* * Look for zero in first byte */ __asm__(".set\tnoreorder\n\t" ".set\tnoat\n" "1:\tand\t$1,%2,%1\n\t" "beq\t$0,$1,2f\n\t" "sll\t%2,%2,1\n\t" "bne\t$0,%2,1b\n\t" "addiu\t%0,%0,1\n\t" ".set\tat\n\t" ".set\treorder\n" : "=r" (set) : "r" (*p >> bit), "r" (1), "0" (0) : "$1"); if (set < (32 - bit)) return set + offset; set = 32 - bit; p++; } /* * No zero yet, search remaining full bytes for a zero */ res = find_first_zero_bit (p, size - 32 * (p - (unsigned long *) addr)); return (offset + set + res); } /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ extern __inline__ unsigned long ffz(unsigned long word) { unsigned int __res; unsigned int mask = 1; __asm__ __volatile__ ( ".set\tnoreorder\n\t" ".set\tnoat\n\t" "move\t%0,$0\n" "1:\tand\t$1,%2,%1\n\t" "beqz\t$1,2f\n\t" "sll\t%1,1\n\t" "bnez\t%1,1b\n\t" "addiu\t%0,1\n\t" ".set\tat\n\t" ".set\treorder\n" "2:\n\t" : "=r" (__res), "=r" (mask) : "r" (word), "1" (mask) : "$1"); return __res; } #endif /* __ASM_MIPS_BITOPS_H */ |